Lithium–sulfur (Li–S) batteries with high energy density and long cycle life are considered to be one of the most promising next-generation energy-storage systems beyond routine lithium-ion batteries. Various approaches have been proposed to break down technical barriers in Li–S battery systems. The use of nanostructured metal oxides and sulfides for high sulfur utilization and long life span of Li–S batteries is reviewed here. The relationships between the intrinsic properties of metal oxide/sulfide hosts and electrochemical performances of Li–S batteries are discussed. Nanostructured metal oxides/ sulfides hosts used in solid sulfur cathodes, separators/interlayers, lithium- metal-anode protection, and lithium polysulfides batteries are discussed respectively. Prospects for the future developments of Li–S batteries with nanostructured metal oxides/sulfides are also discussed.
上傳時間： 2017-11-23
上傳用戶：653357637
This chapter surveys the high temperature and oxygen partial pressure behavior of complex oxide heterostructures as determined by in situ synchrotron X-ray methods. We consider both growth and post-growth behavior, emphasizing the observation of structural and interfacial defects relevant to the size-dependent properties seen in these systems.
標簽： Metal-Oxides Thin Film
上傳時間： 2020-06-07
上傳用戶：shancjb
FDTD for 2D metal plane object, It is very valuable reference because is the basement for 3D FDTD program.
標簽： FDTD for reference basement
上傳時間： 2015-12-08
上傳用戶：古谷仁美
Study of heat transfer and temperature of a 1x1 metal plate
標簽： temperature transfer Study metal
上傳時間： 2015-12-13
上傳用戶：253189838
CT圖像金屬偽影消除技術的文獻。共3篇。 Reduction of Metal Artifacts in X-Ray Computed Tomography XrayCT_artifacts Reduction of CT Artifacts Caused by Metallic Implants 由Willi A. Kalender, PhD Robert Hebel, Dipl Phys Johannes Ebersberger, Dr rer nat撰寫
標簽： XrayCT_artifacts Tomography Reduction Artifacts
上傳時間： 2013-12-06
上傳用戶：腳趾頭
metal detect mahmod bakhtavar
標簽： bakhtavar detect mahmod metal
上傳時間： 2014-12-21
上傳用戶：shanml
Construction Strategy of ESD Protection CircuitAbstract： The principles used to construct ESD protection on circuits and the basic conceptions of ESD protection design are presented.Key words：ESD protection/On circuit, ESD design window, ESD current path1 引言靜電放電（ESD，Electrostatic Discharge）給電子器件環境會帶來破壞性的后果。它是造成集成電路失效的主要原因之一。隨著集成電路工藝不斷發展，互補金屬氧化物半導體（CMOS，Complementary Metal-Oxide Semiconductor）的特征尺寸不斷縮小，金屬氧化物半導體(MOS, Metal-Oxide Semiconductor)的柵氧厚度越來越薄，MOS 管能承受的電流和電壓也越來越小，因此要進一步優化電路的抗ESD 性能，需要從全芯片ESD 保護結構的設計來進行考慮。
標簽： Construction Strategy ESD of
上傳時間： 2013-11-09
上傳用戶：Aidane
基于PIC單片機的脈沖電源:設計了一種金屬凝固過程用脈沖電源。該電源采用PIC16F877作為主控芯片，實現對窄脈沖電流幅值的檢測，以及時電流脈沖幅值根據模糊PID算法進行閑環控制。使用結果表明：該電源的輸出脈沖波形良好，電流幅值穩定，滿足合金材料凝固過程的工藝要求且運行穩定可靠。關鍵詞：脈沖電源；PIC16F877單片機；模糊PID；閑環控制 Abstract：A kind of pulse power supply was designed which uses in the metal solidification process ．．I11is power supply used PIC16F877 to take the master control chip reali on to the narrow pulse electric current peak-to-peak value examination，carried on the closed-loop control to the electric current pulse peak-to-peak value basis fuzzy PID algorithm．The use result indicated ，this power supply output se profile is good，and the electric current peak-to-p~k value is stable，It satisfies the alloy material solidification process the technological requirement and movement stable reliable，Key words：p se po wer supply；PIC16F877single-chip microcontroller；f r PID；closed-loop control
上傳時間： 2013-10-27
上傳用戶：xcy122677
Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.
上傳時間： 2014-12-28
上傳用戶：zhang97080564
Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.
上傳時間： 2013-12-07
上傳用戶：bruce
