HackRF ONE， hardware 源代碼
上傳時間： 2016-05-17
上傳用戶：vvvooo
Data science is a term that the media has chosen to minimize, obfuscate, and sometimes misuse. It involves a lot more than just data and the science of working with data. Today, the world uses data science in all sorts of ways that you might not know about, which is why you need Data Science Programming All-in-ONE For Dummies
標簽： Programming All-In-ONE Science Data
上傳時間： 2020-06-10
上傳用戶：shancjb
EPLAN EEC ONE的中文版手冊，屬于eplan的高端應用。
標簽： eplan
上傳時間： 2022-05-05
上傳用戶：
ONE can make a low distortion tuneable oscillatorby incorporating an active filter inside an AGC
上傳時間： 2013-04-24
上傳用戶：wangxuan
FEATURES Unique 1-Wire interface requires only ONE port pin for communication Multidrop capability simplifies distributed temperature sensing applications Requires no external compONEnts Can be powered from data line. Power supply range is 3.0V to 5.5V Zero standby power required Measures temperatures from -55°C to +125°C. Fahrenheit equivalent is -67°F to +257°F ±0.5°C accuracy from -10°C to +85°C Thermometer resolution is programmable from 9 to 12 bits Converts 12-bit temperature to digital word in 750 ms (max.) User-definable, nonvolatile temperature alarm settings Alarm search command identifies and addresses devices whose temperature is outside of programmed limits (temperature alarm condition) Applications include thermostatic controls, industrial systems, consumer products, thermometers, or any thermally sensitive system
上傳時間： 2013-08-04
上傳用戶：CHENKAI
·基本信息Practical Antenna Handbook, 4th EditionbyJoseph J.Carr作者 Jeseph J. Carr 美國國防部航空電子(avionics)資深工程師ONE of the worlds leading and prolific writer and working scientist on electronics and radio, and an
標簽： nbsp Practical Handbook Antenna
上傳時間： 2013-04-24
上傳用戶：yare
VHDL source codes of the FPGA64, a fpga implementation of the C64 computer. Version for the c-ONE fpga board.
上傳時間： 2013-08-05
上傳用戶：wwwe
本文簡單討論并總結了VHDL、Verilog，System verilog 這三中語言的各自特點和區別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from ONE HDL to another.
標簽： Verilog verilog System VHDL
上傳時間： 2013-10-16
上傳用戶：牛布牛
ONE of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions
上傳時間： 2013-10-17
上傳用戶：tb_6877751
Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade ONE parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.
上傳時間： 2013-11-17
上傳用戶：菁菁聆聽
