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LSI邏輯公司的低成本語音處理器
目前，對適合家庭和小辦公室應用的Voice OVER IP (VoIP)的解決方案的需求在不斷增長。市場需求的是非常低成本的兩到四路語音話路。LSI邏輯公司的解決方案能夠以非常低的成本卻非常有效地處理高達四路的語音話路，并且可在電話適配器、寬帶調制解調器以及路由器、網(wǎng)關中得到廣泛應用。這些產(chǎn)品的基本組成部分包括語音處理子系統(tǒng)、主處理器、網(wǎng)絡接口和用戶線路接口（SLIC）設備。
標簽：
LSI
邏輯
語音處理器
上傳時間：
2013-10-14
上傳用戶：acwme
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The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are OVER voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.
標簽：
translating
Level
9517
PCA
上傳時間：
2013-12-25
上傳用戶：wsf950131
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The PCA9519 is a 4-channel level translating I2C-bus/SMBus repeater that enables theprocessor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBusmaximum capacitance of 400 pF on the higher voltage side. The SDA and SCL pins areOVER-voltage tolerant and are high-impedance when the PCA9519 is unpowered.
標簽：
4channel
transla
level
9519
上傳時間：
2013-11-19
上傳用戶：jisiwole
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基于單DSP的VoIP模擬電話適配器研究與實現(xiàn):提出和實現(xiàn)了一種新穎的基于單個通用數(shù)字信號處理器(DSP)的VoIP模擬電話適配器方案。DSP的I/O和存儲資源非常有限，通常適于運算密集型應用，不適宜控制密集型應用[5]。該系統(tǒng)高效利用單DSP的I/O和片內(nèi)外存儲器資源，采用μC/OS-II嵌入式實時操作系統(tǒng)，支持SIP和TCP-UDP/IP協(xié)議，通過LAN或者寬帶接入，使普通電話機成為Internet終端，實現(xiàn)IP電話。該系統(tǒng)軟硬件結構緊湊高效，運行穩(wěn)定，成本低，具有廣闊的應用前景。關鍵詞：模擬電話適配器；IP電話；數(shù)字信號處理器；μC/OS-II
【Abstract】This paper presents a VoIP ATA solution based on a single digital signal processor (DSP). DSPs are suitable for arithmetic-intensiveapplication and unsuitable for control-intensive application because of the limitation of I/O and memory resources. This solution is based on a 16-bitfixed-point DSP and μC/OS-II embedded real-time operating system. It makes good use of the limited resources, supports SIP and TCP-UDP/IPprotocol. It can connect the analog telephone to Internet and realize the VoIP application. This system has a great future for its high efficiency andlow cost.【Key words】Analog telephone adapter (ATA); Voice OVER Internet protocol (VoIP); Digital signal processor (DSP); μC/OS-II
Research and Implementation of VoIPATA Based on Single DSP
標簽：
VoIP
DSP
模擬電話
適配器
上傳時間：
2013-11-20
上傳用戶：Wwill
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Designing Boards with Atmel AT89C51, AT89C52, AT89C1051, and AT89C2051 for Writing Flash at In-Circuit Test:Recent improvements in chips andtesters have made it possible for thetester to begin taking OVER the role traditionallyassigned to the PROM programmer.Instead of having a PROM programmerwrite nonvolatile memoriesbefore assembling the board, the in-circuittester writes them during in-circuittesting operations. Many Teradyne Z18-series testers are now in use loadingcode into nonvolatile memories, microcontrollersand in-circuit programmable logic devices. The purpose of this note is to explain how the Z18 approaches the writing task for Atmel AT89C series IC’s,so that designers of boards using these chips can get the best results.
標簽：
Designing
Boards
Atmel
with
上傳時間：
2013-11-20
上傳用戶：lijianyu172
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The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed OVER any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.
標簽：
Demonstration
3200
USB
for
上傳時間：
2014-02-27
上傳用戶：zhangzhenyu
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This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to
market. This allows FPGA users to design their own customized safety controllers and provides a significant
competitive advantage OVER traditional microcontroller or ASIC-based designs.
Introduction
The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in
cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas
around machines such as fast-moving robots, and distributed control systems in process automation equipment such
as those used in petrochemical plants.
The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of
electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing
safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was
developed in the mid-1980s and has been revised several times to cOVER the technical advances in various industries.
In addition, derivative standards have been developed for specific markets and applications that prescribe the
particular requirements on functional safety systems in these industry applications. Example applications include
process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC
62304), automotive (ISO 26262), power generation, distribution, and transportation.
圖Figure 1. Local Safety System
標簽：
FPGA
安全系統(tǒng)
上傳時間：
2013-11-05
上傳用戶：維子哥哥
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Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design OVER 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables
標簽：
Solutions
Analog
Xilinx
FPGAs
上傳時間：
2013-11-01
上傳用戶：a67818601
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Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design OVER 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-gates cells called complexprogrammable logic devices (CPLDs)or they can be high-density devicesbased on SRAM look-up tables (LUTs)
標簽：
Solutions
Analog
Altera
FPGAs
上傳時間：
2013-11-08
上傳用戶：蟲蟲蟲蟲蟲蟲
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This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream OVER a network.
標簽：
Spartan
XAPP
FPGA
098
上傳時間：
2014-08-16
上傳用戶：adada
