This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
C8051F340/1/2/3/4/5/6/7 devices are fully integrated mixed-signal System-on-a-Chip MCUs. Highlighted
features are listed below. Refer to Table 1.1 for specific product feature selection
