This string-include defines all string functions as inline functions. Use gcc. It also assumes ds=es=data space, this should be normal. Most of the string-functions are rather heavily hand-Optimized, see especially strtok,strstr,str[c]spn. They should work, but are not very easy to understand. Everything is done entirely within the register set, making the functions fast and clean.
標簽： functions string-include defines assumes
上傳時間： 2014-01-09
上傳用戶：tedo811
Generating Fractals with SSE/SSE2 You probably have heard about fractals before. They are beautiful pictures such as the one shown above. Any fractal can be described using iterative formulas. So you can generate a fractal by evaluating these formulas and finding the color of each pixel. That is a large computational task, and drawing a fractal needs a fast CPU and a carefully Optimized program.
標簽： Generating SSE beautiful Fractals
上傳時間： 2016-11-03
上傳用戶：小鵬
The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, Optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x DSP controller devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.
標簽： TMS 320 generation 240
上傳時間： 2013-12-16
上傳用戶：GavinNeko
The XC226x derivatives are high-performance members of the Infineon XC2000 Family of full-feature single-chip CMOS microcontrollers. These devices extend the functionality and performance of the C166 Family in terms of instructions (MAC unit), peripherals, and speed. They combine high CPU performance (up to 80 million instructions per second) with extended peripheral functionality and enhanced IO capabilities. Optimized peripherals can be adapted flexibly to meet the application requirements. These derivatives utilize clock generation via PLL and internal or external clock sources. Onchip memory modules include program Flash, program RAM, and data RAM.
標簽： high-performance full-feature derivatives Infineon
上傳時間： 2016-12-12
上傳用戶：wab1981
ucos2 is a file system for embedded applications which can be used on any media, for which you can provide basic hardware access functions. µ C/FS is a high performance library that has been Optimized for minimum memory consumption in RAM and ROM, high speed and versatility. It is written in ANSI C and can be used on any CPU.
標簽： which applications can for
上傳時間： 2017-01-04
上傳用戶：偷心的海盜
ucos2 is a file system for embedded applications which can be used on any media, for which you can provide basic hardware access functions. µ C/FS is a high performance library that has been Optimized for minimum memory consumption in RAM and ROM, high speed and versatility. It is written in ANSI C and can be used on any CPU.
標簽： which applications can for
上傳時間： 2017-01-04
上傳用戶：13517191407
200-MHz ARM920T Processor • 16-kbyte Instruction Cache • 16-kbyte Data Cache • Linux® , Microsoft® Windows® CE-enabled MMU • 100-MHz System Bus • MaverickCrunch™ Math Engine • Floating Point, Integer, and Signal Processing Instructions • Optimized for digital music compression and decompression algorithms. • Hardware interlocks allow in-line coding. • MaverickKey™ IDs • 32-bit Unique ID can be used for DRM-compliant 128-bit random ID. • Integrated Peripheral Interfaces • 32-bit SDRAM Interface
標簽： 8226 Cache kbyte Instruction
上傳時間： 2017-04-08
上傳用戶：comua
The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device鈥檚 cascadable feature allows up to four devices to share a common two-wire bus. The device is Optimized for use in many industrial and commercial applications where lowpower and low-voltage operation are essential. The devices are available in spacesaving 8-pin PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array (LAP), and 8-lead SAP packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.
標簽： electrically programmable provides erasable
上傳時間： 2017-04-09
上傳用戶：cc1015285075
Algorithms for programmers This draft is intended to turn into a book about selected algorithms. The audience in mind are programmers who are interested in the treated algorithms and actually want to have/create working and reasonably Optimized code.
標簽： programmers Algorithms algorithms intended
上傳時間： 2014-01-22
上傳用戶：jqy_china
These Fourier routines were originally based on the Fourier routines of the same names from the NETLIB bihar and fftpack fortran libraries developed by Paul N. Swarztrauber at the National Center for Atmospheric Research in Boulder, CO USA. They have been reimplemented in C and Optimized in a few ways for OggSquish.
標簽： routines Fourier the originally
上傳時間： 2017-09-12
上傳用戶：小眼睛LSL
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