狠狠色综合网站久久久久久久,亚洲国产欧美一区,欧美成人性网

PCI-master

基于FPGA的PCI接口源代碼及Testbenc

基于FPGA的PCI接口源代碼及Testbenc

標簽： Testbenc FPGA PCI 接口

上傳時間： 2013-08-20

上傳用戶：sun_pro12580
用vhdl編寫的pci源代碼。花了我2000多元錢買來的

用vhdl編寫的pci源代碼。花了我2000多元錢買來的，編譯通過！

標簽： vhdl 2000 pci 編寫

上傳時間： 2013-08-29

上傳用戶：brilliantchen
利用高速FPGA實現(xiàn)PCI總線接口的設計方案

PCI是一種高性能的局部總線規(guī)范，可實現(xiàn)各種功能標準的PCI總線卡。本文簡要介紹了PCI總線的特點、信號與命令，提出了一種利用高速FPGA實現(xiàn)PCI總線接口的設計方案。\r\n

標簽： FPGA PCI 總線接口設計方案

上傳時間： 2013-08-30

上傳用戶：brain kung
基于FPGA的PCI總線接口的設計方案

基于FPGA的PCI總線接口的設計方案\r\n~！

標簽： FPGA PCI 總線接口設計方案

上傳時間： 2013-09-01

上傳用戶：heart520beat
PCI ExpressTM Architecture

PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.

標簽： Architecture ExpressTM PCI

上傳時間： 2013-11-03

上傳用戶：gy592333
pci e PCB設計規(guī)范

This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.

標簽： pci PCB 設計規(guī)范

上傳時間： 2013-10-15

上傳用戶：busterman
PCI Express電源解決方案

PCI ExpressTM is the third generation of PCI (PeripheralComponent Interconnect) technology used to connect I/Operhipheral devices in computer systems. It is intended asa general purpose I/O device interconnect that meets theneeds of a wide variety of computing platforms such asdesktop, mobile, server and communications. It alsospecifies the electrical and mechanical attributes of thebackplane, connectors and removable cards in thesesystems.

標簽： Express PCI 電源解決方案

上傳時間： 2013-11-17

上傳用戶：squershop
基于PCI總線的STM32運動控制卡的設計

在深入分析了意法半導體公司推出的STM32、高速PCI總線以及運動控制卡的功能和結(jié)構(gòu)特點的基礎(chǔ)上，設計了一款可直接插在PCI 插槽中的伺服運動控制卡。不僅可大大降低了成本，更為開放式數(shù)控系統(tǒng)的研究提供了一個全新的思路。結(jié)果表明，本文所設計的伺服控制卡滿足了目前控制系統(tǒng)的性能和要求。

標簽： PCI STM 32 總線

上傳時間： 2014-12-25

上傳用戶：l銀幕海
基于PCI9052的PCI局部總線應用

詳細介紹了PCI9052接口器件的功能、結(jié)構(gòu)和使用方法，并結(jié)合實際給出了基于PCI9052器件開發(fā)PCI總線接口卡的應用實例。 Abstract: The main functions,structures and usage of PCI9052inferface chip are introduced in detail in this paper.And an application example of designing PCI bus interface card based on PCI9052is proposed in this paper.

標簽： PCI 9052 局部總線

上傳時間： 2013-10-16

上傳用戶：togetsomething
應用PCI 9656的數(shù)據(jù)接收卡設計

PCI 9656是PLX公司設計的一款高速PCI I/O芯片，可應用于66MHz、64bit PCI和CompactPCI總線。文章簡述了PCI 9656的主要功能，介紹了一種應用PCI 9656的CompactPCI數(shù)據(jù)接收卡設計。設計中采用MAXII系列CPLD建立了PCI 9656與FIFO間的數(shù)據(jù)通道，可滿足高速數(shù)據(jù)傳輸?shù)囊蟆?/p>
標簽： 9656 PCI 數(shù)據(jù)接收

上傳時間： 2014-11-28

上傳用戶：1184599859

<rt id="wacka"></rt>

<rt id="wacka"></rt>