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PROCESSOR

WP200-將Spartan-3 FPGA用作遠程數碼相機的低成本控制器

The introduction of Spartan-3™ devices has createdmultiple changes in the evolution of embedded controldesigns and pushed processing capabilities to the “almostfreestage.” With these new FPGAs falling under $20, involume, with over 1 million system gates, and under $5for 100K gate-level units, any design with programmablelogic has a readily available 8- or 16-bit PROCESSOR costingless than 75 cents and 32-bit PROCESSOR for less than $1.50.

標簽： Spartan FPGA 200 WP

上傳時間： 2013-12-10

上傳用戶：zgu489
XAPP719 -利用USR_ACCESS寄存器實現PowerPC高速緩存配置

The Virtex™-4 user access register (USR_ACCESS_VIRTEX4) is a 32-bit register thatprovides direct access to bitstream data by the FPGA fabric. It is useful for loadingPowerPC™ 405 (PPC405) PROCESSOR caches and/or other data into the FPGA after the FPGAhas been configured, thus achieving partial reconfiguration. The USR_ACCESS_VIRTEX4register is programmed through the bitstream with a command that writes a series of 32-bitwords.

標簽： USR_ACCESS PowerPC XAPP 719

上傳時間： 2013-11-13

上傳用戶：我累個乖乖
PLB Block RAM(BRAM)接口控制器

The PLB BRAM Interface Controller is a module thatattaches to the PLB (PROCESSOR Local Bus).

標簽： Block BRAM PLB RAM

上傳時間： 2013-10-27

上傳用戶：zoudejile
DS306-PPC405 Virtex-4 Wrapper

The PPC405 Virtex-4 is a wrapper around the Virtex-4PowerPC™ 405 PROCESSOR Block primitive. For detailsregarding the PowerPC 405, see the PowerPC 405 PROCESSORBlock Reference Guide.

標簽： Wrapper Virtex 306 405

上傳時間： 2014-12-05

上傳用戶：flg0001
WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案

WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案：Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore PROCESSORs and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a PROCESSOR-centric approach by defining a comprehensive PROCESSOR system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

標簽： 369 WP 擴展式處理平臺

上傳時間： 2013-10-22

上傳用戶：685
xilinx Zynq-7000 EPP產品簡介

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMPROCESSOR-based system with Xilinx 28nm programmable logic—in a single device. The PROCESSOR boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.

標簽： xilinx Zynq 7000 EPP

上傳時間： 2013-11-01

上傳用戶：dingdingcandy
XAPP740利用AXI互聯設計高性能視頻系統

This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ PROCESSOR. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board

標簽： XAPP 740 AXI 互聯

上傳時間： 2013-11-14

上傳用戶：fdmpy
帶有SerDes接口的PLB千兆位級以太網MAC

This application note describes a reference system which illustrates how to build an embeddedPowerPC® system using the Xilinx 1-Gigabit Ethernet Media Access Controller PROCESSOR core.This system has the PLB_Gemac configured to use Scatter/Gather Direct Memory Access andthe Serializer/Deserializer (SerDes) interface. This application note describes how to set up thespecific clocking structure required for the SerDes interface and the constraints to be added tothe UCF file. This reference system is complete with a standalone software application to testsome of the main features of this core, including access to registers, DMA capabilities, transmitand receive in loopback mode. This reference system is targeted for the ML300 evaluationboard.

標簽： SerDes PLB MAC 接口

上傳時間： 2013-11-01

上傳用戶：truth12
XAPP807-封裝最小的三態以太網MAC處理引擎

The Tri-Mode Ethernet MAC (TEMAC) UltraController-II module is a minimal footprint,embedded network processing engine based on the PowerPC™ 405 (PPC405) PROCESSOR coreand the TEMAC core embedded within a Virtex™-4 FX Platform FPGA. The TEMACUltraController-II module connects to an external PHY through Gigabit Media IndependentInterface (GMII) and Management Data Input/Output (MDIO) interfaces and supports tri-mode(10/100/1000 Mb/s) Ethernet. Software running from the PROCESSOR cache reads and writesthrough an On-Chip Memory (OCM) interface to two FIFOs that act as buffers between thedifferent clock domains of the PPC405 OCM and the TEMAC.

標簽： XAPP 807 MAC 封裝

上傳時間： 2013-10-26

上傳用戶：yuzsu
集成PowerQUICC處理器的MPC8313E簡介

This document provides an overview of the MPC8313E PowerQUICC™II Pro PROCESSOR features, including a block diagram showing the major functional components.

標簽： PowerQUICC 8313E 8313 MPC

上傳時間： 2013-11-20

上傳用戶：myworkpost

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