This function resamples the images at the new grid points defined by the new Pixel sizes. It assumes that intensities are defined at the Pixel centers
標(biāo)簽： the resamples new function
上傳時間： 2014-01-09
上傳用戶：WMC_geophy
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per Pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
標(biāo)簽： XAPP 740 AXI 互聯(lián)
上傳時間： 2013-11-14
上傳用戶：fdmpy
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per Pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
標(biāo)簽： XAPP 740 AXI 互聯(lián)
上傳時間： 2013-11-23
上傳用戶：shen_dafa
基于Philips LPC2104芯片，針對Pixel＋ 30萬象素攝像頭的控制程序
上傳時間： 2015-03-16
上傳用戶：erkuizhang
The Hopfield model is a distributed model of an associative memory. Neurons are Pixels and can take the values of -1 (off) or +1 (on). The network has stored a certain number of Pixel patterns. During a retrieval phase, the network is started with some initial configuration and the network dynamics evolves towards the stored pattern which is closest to the initial configuration.
標(biāo)簽： model distributed associative Hopfield
上傳時間： 2015-06-17
上傳用戶：l254587896
Wavelets have widely been used in many signal and image processing applications. In this paper, a new serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet transform, which is realised using some FIFO memory modules implementing a Pixel-level pipeline architecture to compress and decompress images. The real filter calculation over 4 · 4 window blocks is done using a tree of carry save adders to ensure the high speed processing required for many applications. The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis reveals that the proposed architecture, implemented using current VLSI technologies, can process a video stream in real time.
標(biāo)簽： applications processing Wavelets widely
上傳時間： 2014-01-22
上傳用戶：hongmo
In this paper we propose to reduce the textural components by modelling the coefficients of a wedgelet based regression tree instead of the original Pixel intensities
標(biāo)簽： coefficients components modelling the
上傳時間： 2015-10-22
上傳用戶：gxmm
The problem of image registration subsumes a number of problems and techniques in multiframe image analysis, including the computation of optic flow (general Pixel-based motion), stereo correspondence, structure from motion, and feature tracking. We present a new registration algorithm based on spline representations of the displacement field which can be specialized to solve all of the above mentioned problems. In particular, we show how to compute local flow, global (parametric) flow, rigid flow resulting from camera egomotion, and multiframe versions of the above problems. Using a spline-based description of the flow removes the need for overlapping correlation windows, and produces an explicit measure of the correlation between adjacent flow estimates. We demonstrate our algorithm on multiframe image registration and the recovery of 3D projective scene geometry. We also provide results on a number of standard motion sequences.
標(biāo)簽： image registration multiframe techniques
上傳時間： 2016-01-20
上傳用戶：520
map identification laquo yuan Problem description : the digital image processing of an image often expressed as a macute M Pixel matrix. Each Pixel value is 0 or 1. The value of 0 Pixel image, said background, and the value of a Pixel image, said a map of a million, usually called map million Pixels. When a Pixel in another Pixels above, below, left or right, said that two adjacent Pixels of the Pixel. An image of the Pixels belonging to the same map yuan, instead of adjacent Pixels belonging to different map yuan. Figure yuan identification of problems is right for the given image Pixel map marking yuan, making the same map billion yuan Pixel map of the same markings and different map billion yuan Pixel map of their marks are different. Trial queue abstract data type design solut
標(biāo)簽： image identification description processing
上傳時間： 2013-12-15
上傳用戶：15736969615
When working with mathematical simulations or engineering problems, it is not unusual to handle curves that contains thousands of points. Usually, displaying all the points is not useful, a number of them will be rendered on the same Pixel since the screen precision is finite. Hence, you use a lot of resource for nothing! This article presents a fast 2D-line approximation algorithm based on the Douglas-Peucker algorithm (see [1]), well-known in the cartography community. It computes a hull, scaled by a tolerance factor, around the curve by choosing a minimum of key points. This algorithm has several advantages: 這是一個基于Douglas-Peucker算法的二維估值算法。
標(biāo)簽： mathematical engineering simulations problems
上傳時間： 2013-12-20
上傳用戶：changeboy
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