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Pre-designed

  • 基于MSP430單片機和DS18B20的數字溫度計

    為了在工業生產及過程控制中準確測量溫度,設計了一種基于低功耗MSP430單片機的數字溫度計。整個系統通過單片機MSP430F1121A控制DS18B20讀取溫度,采用數碼管顯示,溫度傳感器DS18B20與單片機之間通過串口進行數據傳輸。MSP430系列單片機具有超低功耗,且外圍的整合性高,DS18B20只需一個端口即可實現數據通信,連接方便。通過多次實驗證明,該系統的測試結果與實際環境溫度一致,除了具有接口電路簡單、測量精度高、誤差小、可靠性高等特點外,其低成本、低功耗的特點使其擁有更廣闊的應用前景。 Abstract:  In order to obtain accurate measuring temperature in industrial production and process control, a digital thermometer based on MSP430 MCU is designed. The system uses MSP430F1121A MCU to control DS18B20, and gets the temperature data, which is displayed on the LED. The temperature sensor DS18B20 and MCU transmit data through serial communication. MSP430 series has ultra-low power and high integration, DS18B20 only needs one port to achieve data communication. Through many experimental results prove, this system is consistent with actual environment temperature. The system has characteristics of interface circuit simple, high measuring accuracy, minor error, high reliability, besides, the characteristics of low cost and low power make it having vaster application prospect.

    標簽: MSP 430 18B B20

    上傳時間: 2013-10-16

    上傳用戶:wettetw

  • 基于自編程功能的MCU Bootloader設計

    Bootloader是微處理器上電時運行的第一段代碼,它可以通過通信接口實現對微處理器內部應用程序的更新升級,為網絡化嵌入式產品的應用程序升級帶來極大的便利。由于目前沒有統一嵌入式系統的Bootloader?;贜EC 78K0系列單片機自編程原理,設計出一個適用于78K0/Fx2系列單片機的Bootloader,并能夠通過單片機串口在線升級應用程序。 Abstract:  Bootloader is the first piece of code executed after microprocessor startup. It makes the embedded product’s firmware update conveniently through communication interface. However, no unified bootloader is available for all kinds of microprocessor products. Based on the principle of self-programming NEC 78K0s’ series, a useful Bootloader which is suitable for 78K0/Fx2s’ series MCU is designed,the design can update the application through serial ports.

    標簽: Bootloader MCU 自編程

    上傳時間: 2013-10-26

    上傳用戶:fang2010

  • SN65LBC170,SN75LBC170,pdf(TRIP

    The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.

    標簽: 170 LBC SN TRIP

    上傳時間: 2013-10-13

    上傳用戶:ytulpx

  • lpc2478完全使用手冊

    NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.

    標簽: 2478 lpc 使用手冊

    上傳時間: 2013-11-15

    上傳用戶:zouxinwang

  • LPC1700以太網MIIM接口應用筆記

    The LPC1700 Ethernet block contains a full featured 10 Mbps or 100 Mbps Ethernet MAC (Media Access Controller) designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, half or full duplex operation, flow control, control frames, hardware acceleration for transmit retry, receive packet filtering and wake-up on LAN activity. Automatic frame transmission and reception with Scatter-Gather DMA off-loads many operations from the CPU.

    標簽: 1700 MIIM LPC 以太網

    上傳時間: 2013-11-09

    上傳用戶:geshaowei

  • FREERTOS的官方移植文檔

    FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples

    標簽: FREERTOS 移植 文檔

    上傳時間: 2013-10-13

    上傳用戶:13162218709

  • PAM2862 1A LED Driver with Int

    The PAM2862 is a continuous mode inductivestep-down converter, designed for driving singleor multiple series connected LEDs efficientlyfrom a voltage source higher than the LEDvoltage. The device operates from an inputupply between 6V and 30V and provides anexternally adjustable output current of up to 1A.Depending upon supply voltage and externalcomponents, this can provide up to 24 watts ofoutput power.

    標簽: Driver 2862 with PAM

    上傳時間: 2013-11-16

    上傳用戶:司令部正軍級

  • PCA9541 2 to 1 I2C-bus master

    The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.

    標簽: master C-bus 9541 PCA

    上傳時間: 2013-10-09

    上傳用戶:3294322651

  • TJA1042 High-speed CAN transce

    The TJA1042 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.

    標簽: High-speed transce 1042 TJA

    上傳時間: 2014-12-28

    上傳用戶:氣溫達上千萬的

  • TJA1051 High-speed CAN transce

    The TJA1051 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.

    標簽: High-speed transce 1051 TJA

    上傳時間: 2013-10-17

    上傳用戶:jisujeke

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