-
Information in this document is subject to change without notice and does notrepresent a commitment on the part of the manufacturer. The software describedin this document is furnished under license agreement or nondisclosureagreement and may be used or copied only in accordance with the terms of theagreement. It is against the law to copy the software on any medium except asspecifically allowed in the license or nondisclosure agreement. The purchasermay make one copy of the software for backup purposes. No part of this manualmay be reproduced or transmitted in any form or by any means, electronic ormechanical, including photocopying, RECORDING, or information storage andretrieval systems, for any purpose other than for the purchaser’s personal use,without written permission.
標(biāo)簽：
keilA
51
教程
上傳時(shí)間：
2014-12-27
上傳用戶：Tracey
-
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, RECORDING, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
標(biāo)簽：
Virtex
FPGA
PCB
設(shè)計(jì)手冊
上傳時(shí)間：
2014-01-13
上傳用戶：竺羽翎2222
-
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you
solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce,
distribute, republish, download, display, post, or transmit the Documentation in any form or by any means
including, but not limited to, electronic, mechanical, photocopying, RECORDING, or otherwise, without the prior
written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation.
Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx
assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections
or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be
provided to you in connection with the Information.
標(biāo)簽：
CPLD
上傳時(shí)間：
2013-10-22
上傳用戶：李哈哈哈
-
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, RECORDING, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
標(biāo)簽：
Virtex
FPGA
PCB
設(shè)計(jì)手冊
上傳時(shí)間：
2013-11-11
上傳用戶：zwei41
-
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you
solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce,
distribute, republish, download, display, post, or transmit the Documentation in any form or by any means
including, but not limited to, electronic, mechanical, photocopying, RECORDING, or otherwise, without the prior
written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation.
Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx
assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections
or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be
provided to you in connection with the Information.
標(biāo)簽：
CPLD
上傳時(shí)間：
2014-12-05
上傳用戶：qazxsw
-
OLE Programmer s Reference
Information in this online help system is subject to change without notice and does not represent a commitment on the part of Microsoft Corporation. The software and/or files described in this online help system are furnished under a license agreement or nondisclosure agreement. The software and/or files may be used or copied only in accordance with the terms of the agreement. The purchaser may make one copy of the software for backup purposes. No part of this online help system may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, RECORDING, or information and retrieval systems, for any purpose other than the purchaser s personal use, without the written permission of Microsoft Corporation.
標(biāo)簽：
Information
Programmer
Reference
subject
上傳時(shí)間：
2015-08-04
上傳用戶：hxy200501
-
In the bank all the activities are being done manually .As the bank widens its services & it finds difficult to manage its operations manually and hence this leads to the automation of some of its operations.
Banking Information system is a windows based applications. This project mainly deals with managing there types of account such as Saving Account, Current Account and Recurring Deposits .
In this project bank is seeking to manage these account through computer based system.
Tasks involved in this project are opening the user accounts , RECORDING the account holders transactions , modify, the user records and generating the reports .
This project is having three module:
] 1. Bank Master Module
2. Transaction Module
3. Reports module
標(biāo)簽：
the
bank
activities
manually
上傳時(shí)間：
2013-12-13
上傳用戶：LouieWu
-
INTRODUCTION In the past, adding speech RECORDING and playback capability to a product meant using a digital signal processor or a specialized audio chip. Now, using a simplified Adaptive Differential Pulse Code Modulation(ADPCM) algorithm, these audio capabilities can be added to any PICmicro device. This application note will cover the ADPCM compression and decompression algorithms, performance comparison of all PICmicro devices, and an application using a PIC16C72 micro-controller.DEFINITION OF TERMS step size -value of the step used for quantization of ana-log signals and inverse quantization of a number of steps.quantization -the digital form of an analog input signal is represented by a finite number of steps.adaptive quantization -the step size of a quantizer is dramatically changed with time in order to adapt to a changing input signal.inverse quantizer -a finite number of steps is converted into a digital representation of an analog signal.
標(biāo)簽：
單片機(jī)
adpcm
編碼
解碼
上傳時(shí)間：
2022-06-20
上傳用戶：
