Zero-order-hold Intended for a senior-level course on the analysis and design of digital control systems, the text is also useful for graduate students and practicing engineers who are learning state-space design techniques.
標簽： Zero-order-hold senior-level Intended analysis
上傳時間： 2013-12-04
上傳用戶：liuchee
Upper gain margin Intended for a senior-level course on the analysis and design of digital control systems, the text is also useful for graduate students and practicing engineers who are learning state-space design techniques.
標簽： senior-level Intended analysis control
上傳時間： 2013-12-12
上傳用戶：225588
操作系統課程設計_進程調度演示源程序 #include "stdio.h" #include "stdlib.h" #include "string.h" typedef struct node { char name[10] /*進程標識符*/ int prio /*進程優先數*/ int round /*進程時間輪轉時間片*/ int cputime /*進程占用CPU時間*/ int needtime /*進程到完成還要的時間*/ int count /*計數器*/ char state /*進程的狀態*/ struct node *next /*鏈指針*/ }PCB
標簽： include typedef stdlib string
上傳時間： 2016-08-09
上傳用戶：鳳臨西北
The main features of the considered identification problem are that there is no an a priori separation of the variables into inputs and outputs and the approximation criterion, called misfit, does not depend on the model representation. The misfit is defined as the minimum of the l2-norm between the given time series and a time series that is consistent with the approximate model. The misfit is equal to zero if and only if the model is exact and the smaller the misfit is (by definition) the more accurate the model is. The considered model class consists of all linear time-invariant systems of bounded complexity and the complexity is specified by the number of inputs and the smallest number of lags in a difference equation representation. We present a Matlab function for approximate identification based on misfit minimization. Although the problem formulation is representation independent, we use input/state/output representations of the system in order
標簽： identification considered features separati
上傳時間： 2016-09-20
上傳用戶：FreeSky
A Matlab toolbox for exact linear time-invariant system identification is presented. The emphasis is on the variety of possible ways to implement the mappings from data to parameters of the data generating system. The considered system representations are input/state/output, difference equation, and left matrix fraction. KEYWORDS: subspace identification, deterministic subspace identification, balanced model reduction, approximate system identification, MPUM.
標簽： identification time-invariant presented emphasis
上傳時間： 2013-12-28
上傳用戶：wfl_yy
Aspect-Oriented Software Developement Coverage includes Using AOSD to streamline complex systems development without sacrificing flexibility or scalability How AOSD builds on the object-oriented paradigmand how it s different State-of-the-art best practices for the AOSD development process Languages and foundations: separating concerns, filter technologies, improving modularity, integrating new features, and more Using key AOSD tools, including AspectJ, Hyper/J, JMangler, and Java Aspect Components Engineering aspect-oriented systems: UML, concern modeling and elaboration, dependency management, and aspect composition Developing more secure applications with AOSD techniques Applying aspect-oriented programming to database systems Building dynamic aspect-oriented infrastructure
標簽： Aspect-Oriented Developement streamline Software
上傳時間： 2013-12-01
上傳用戶：jennyzai
同步DMX512 簡介和控制器的設計 在燈具調光和控制中，人們大量采用了DMX512 的控制協議，它是由美國劇 場技術協會（United State Institute for Theatre Technology，Inc）于1986 年8 月提出的一個能在一對線上傳送512 路可控硅調光亮度信息的標準. DMX512 通信方式是采用了異步通信格式,每個調光點由11 位組成,其中一個 是起始位,8 位調光數據,兩個停止位.每一次傳輸能512 個調光點.
上傳時間： 2014-01-20
上傳用戶：gonuiln
自適應turbo碼OFDM的研究論文。國外碩士論文，對OFDM研究者有一定的參考作用。-- adaptive turbo-coded OFDM, Thesis submitted to the Faculty of the Virginia Polytechnic Institute and State university in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering.
上傳時間： 2013-12-09
上傳用戶：784533221
The ADC0803 family is a series of three CMOS 8-bit successive approximation A/D converters using a resistive ladder and capacitive array together with an auto-zero comparator. These converters are designed to operate with microprocessor-controlled buses using a minimum of external circuitry. The 3-State output data lines can be connected directly to the data bus.
標簽： approximation converters successive family
上傳時間： 2016-11-20
上傳用戶：libenshu01
rc5的decryption，同樣帶state machine，同樣有四個狀態
標簽： decryption rc5
上傳時間： 2016-11-22
上傳用戶：llandlu
