-- DESCRIPTION : Shift register -- Type : univ -- Width : 4 -- Shift direction: right/left (right active high) -- -- CLK active : high -- CLR active : high -- CLR type : synchronous -- SET active : high -- SET type : synchronous -- LOAD active : high -- CE active : high -- SERIAL input : SI
標簽： Shift right DESCRIPTION direction
上傳時間： 2013-12-02
上傳用戶：gxrui1991
Data Acquisition Device 數(shù)據(jù)采集辦法 * Module Description組件描述: * Analog Data Acquisition模擬數(shù)據(jù)采集器組件使用 EE314 * 設(shè)備接口通過RS232串行口SERIAL port到PC，同時提供協(xié)議protocol支持最多5個對 * 手方頻道
標簽： Acquisition Data Description Analog
上傳時間： 2016-08-26
上傳用戶：alan-ee
本代碼應(yīng)用于串口通信的應(yīng)用熟悉Tornado的集成開發(fā)環(huán)境，通過CS850（CPU是Motorola的Power PC 850）的SCC（SERIAL Communication Controller）端口在NMSI方式下實現(xiàn)HDLC（High Data Link Communication）協(xié)議的自環(huán)通信。
上傳時間： 2014-01-19
上傳用戶：hullow
常用串行EEPROM的編程應(yīng)用，SPI總線(SERIAL Peripheral Interface串行外圍設(shè)備接口總線)是三線式的串行總線，是由摩托羅拉公司所研發(fā)，使用三線進行數(shù)據(jù)傳輸，分別是SCK時鐘引腳，SI數(shù)據(jù)輸入引腳和SO數(shù)據(jù)輸出引腳。
標簽： EEPROM 串行 編程應(yīng)用
上傳時間： 2013-12-21
上傳用戶：894898248
改變wince上usb的client，可以在SERIAL，mass storage和rndis之間切換。
上傳時間： 2013-12-23
上傳用戶：koulian
ST7787 芯片的SPEC，比亞迪2.4inchLCM的SPEC。The ST7787 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 720 source line and 320 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts SERIAL Peripheral Interface (SPI), 8-bits/9-bits/16-bits/18-bits parallel interface. Display data can be stored in the on-chip display data RAM of 240x320x18 bits. It can perform display data RAM read/write operation with no external operation clock to minimize power consumption. In addition, because of the integrated power supply circuits necessary to drive liquid crystal, it is possible to make a display system with the fewest components.
上傳時間： 2016-09-22
上傳用戶：woshini123456
SPI，是英語SERIAL Peripheral interface的縮寫，顧名思義就是串行外圍設(shè)備接口,這是對SPI的總體概述
標簽： SPI
上傳時間： 2013-12-16
上傳用戶：極客
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a SERIAL data line (SDA) and a SERIAL clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • SERIAL, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標簽： bus bidirectional primarily designed
上傳時間： 2013-12-11
上傳用戶：jeffery
SPI Master Core Specification，This document provides specifications for the SPI (SERIAL Peripheral Interface) Master core
標簽： Specification Master Core SPI
上傳時間： 2016-10-27
上傳用戶：lacsx
做網(wǎng)格的好程序，PARAMESH is a package of Fortran 90 subroutines designed to provide an application developer with an easy route to extend an existing SERIAL code which uses a logically cartesian structured mesh into a parallel code with adaptive mesh refinement(AMR).
上傳時間： 2014-01-06
上傳用戶：壞壞的華仔
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