The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus SLAVE devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the SLAVEdevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the SLAVE devices on the downstream I2C-bus.
上傳時間： 2013-10-09
上傳用戶：3294322651
The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in SLAVE Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.
標簽： synchronous Emulating serial
上傳時間： 2014-01-31
上傳用戶：z1191176801
This application note shows how to write an Inter Integrated Circuit bus driver (I²C) for the Philips P90CL301micro-controller.It is not only an example of writing a driver, but it also includes a set of application interface software routines toquickly implement a complete I²C multi-master system application.For specific applications the user will have to make minimal changes in the driver program. Using the drivermeans linking modules to your application software and including a header-file into the application sourceprograms. A small example program of how to use the driver is listed.The driver supports i.a. polled or interrupt driven message handling, SLAVE message transfers and multi-mastersystem applications. Furthermore, it is made suitable for use in conjunction with real time operating systems, likepSOS+.
上傳時間： 2013-11-23
上傳用戶：weixiao99
Presents short and simple I2C software routines that support onlySLAVE (rather than master or master & SLAVE) operation and an ASMdemonstration program. The SLAVE-only software in this app notecomplements the master mode software presented in AN464, Usingthe 87LPC76X microcontroller as an I2C bus master.
上傳時間： 2013-11-22
上傳用戶：1039312764
I2C interface, is a very powerful tool for system designers. Theintegrated protocols allow systems to be completely software defined.Software development time of different products can be reduced byassembling a library of reusable software modules. In addition, themultimaster capability allows rapid testing and alignment ofend-products via external connections to an assembly-line computer.The mask programmable 87LPC76X and its EPROM version, the87LPC76X, can operate as a master or a SLAVE device on the I2Csmall area network. In addition to the efficient interface to thededicated function ICs in the I2C family, the on-board interfacefacilities I/O and RAM expansion, access to EEPROM andprocessor-to-processor communications.
標簽： microcontro Using 76X LPC
上傳時間： 2013-12-30
上傳用戶：Artemis
基于多點網絡的水廠自動監控系統設計Design of MPI Based Automatic Monitoring and Control System in Water Works劉 美 俊(湖南工程學院，湘潭411101)摘要針對水廠工作水泵多、現場離控制站距離遠的特點，提出了一種基于MPI多點網絡的自動監控系統的設計方法，分析了系統的工作原理，介紹了系統中數據的采集與處理、主站與從站的通信原理以及系統軟件的設計。由于這種系統的主、從站PLC之間采用MPI網絡通信，具有運行可靠、性能價格比高的特點，所以適用于中小規模水廠的分布式監控場合。關鍵詞多點網絡主站從站監控系統Abstract Ina ccordancew ithth efe atuersof w aterw orks,i. e. ，manyp umpsin o perationa ndth ep umps， farfor mt hec ontrolst ation,th em ethodo fdesigninga na utomati(〕monitoringa ndc ontorlsy stemb asedo nM PIis p resented.Th eo perationalpr incipleo fth esy stemi san alyzed,th ed atac olection,data processing; communication between master station and SLAVE station as wel as design and system software are discussed. Because MPI network communicationis used among master station, SLAVE stations and PLC, the system is reliable and high cost-efective. It is， suitable for smal and mediumsized water works for distrbuted monitoring and control.Keywords MPI Masterst ation SLAVEs tation Monitoringa ndc ontorlsy stem 自來 水 廠 的自動控制系統一般分為兩大部分，一對組態硬件要求較高，投資較大。相對而言，MPI網是水源地深水泵的工作控制，一是水廠區變頻恒壓供絡速度可達187.5 M bps，通過一級中繼器傳輸距離可水控制，兩部分的實際距離通常都比較遠。某廠水源達Ikm 。根據水廠的具體情況，確定以MPI方式組地有3臺深井泵給水廠區的蓄水池供水。水廠區的成網絡，主站PLC為S7-300系列的CPU3121FM，從任務是對水池的水進行消毒處理后，通過加壓泵向管站為S7-200系列的CPU222。這樣既滿足了系統要路恒壓供水。選用Siemens公司的S7系列可編程控求，又相對于Profibus網絡節省了三分之一的成本，制器(PLC)和上位機組成實時數據采集和監控系統， 這種分布式監控系統具有較高的性能價格比。系統對深水泵進行遠程控制，對供水泵采用變頻器進行恒中PLC的物理層采用RS - 485接口，網絡延伸選用壓控制以保證整個水廠的電機設備安全、可靠地運帶防雷保護的中繼器，使系統的安全運行得到了保行。證。MPI網絡的拓撲結構如圖1所示。1 多點網絡(NWI)監控系統的組成Sie me ns 公司S7系列PLC通常有MP」多點網絡與Profibus現場總線網絡兩種組網方式。Profibus現場總線的應用目前較為普遍，通用性較好，它由Profibus一DP, Profibus一FMS, Profibus一PA組成。Profibus - DP型用于分散外設間的數據傳輸，傳輸速率為9.6kbps一12Mbps，主要用于現場控制器與分散1/0之間的通信，可滿足交直流調速系統快速響應的時間要求，特別適合于加工自動化領域的應用;Profibus - FMS主要解決車間級通信問題，完成中等傳輸速度的循環或非循環數據交換任務，適用于紡織、樓宇自動化、可編程控制器、低壓開關等;Profibus - PA型采用了OSI模型的物理層和數據鏈路層，適用于過程自動化的總線類型。
上傳時間： 2013-10-09
上傳用戶：fac1003
Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire SLAVE device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire SLAVE devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.
標簽： PicoBlaze Create Master Xilinx
上傳時間： 2013-11-05
上傳用戶：a6697238
Abstract: Communication with 1-Wire SLAVE devices requires a 1-Wire master. There are numerous ways to build a 1-Wire master (see reference design 4206, "Choosing the Right 1-Wire Master for Embedded Applications"). Thisdocument describes the DS1WM, a synthesizable 1-Wire master that can be implemented in an application-specificintegrated circuit (ASIC) or field-programmable gate array (FPGA).
上傳時間： 2014-12-22
上傳用戶：xanxuan
ZigBee技術是一種應用于短距離范圍內，低傳輸數據速率下的各種電子設備之間的無線通信技術。ZigBee名字來源于蜂群使用的賴以生存和發展的通信方式，蜜蜂通過跳ZigZag形狀的舞蹈來通知發現的新食物源的位置、距離和方向等信息，以此作為新一代無線通訊技術的名稱。ZigBee過去又稱為“HomeRF Lite”、“RF-EasyLink”或“FireFly”無線電技術，目前統一稱為ZigBee技術。 2、ZigBee技術的特點 自從馬可尼發明無線電以來，無線通信技術一直向著不斷提高數據速率和傳輸距離的方向發展。例如：廣域網范圍內的第三代移動通信網絡（3G）目的在于提供多媒體無線服務，局域網范圍內的標準從IEEE802.11的1Mbit/s到IEEE802.11g的54Mbit/s的數據速率。而當前得到廣泛研究的ZigBee技術則致力于提供一種廉價的固定、便攜或者移動設備使用的極低復雜度、成本和功耗的低速率無線通信技術。這種無線通信技術具有如下特點： 功耗低：工作模式情況下，ZigBee技術傳輸速率低，傳輸數據量很小，因此信號的收發時間很短，其次在非工作模式時，ZigBee節點處于休眠模式。設備搜索時延一般為30ms，休眠激活時延為15ms，活動設備信道接入時延為15ms。由于工作時間較短、收發信息功耗較低且采用了休眠模式，使得ZigBee節點非常省電，ZigBee節點的電池工作時間可以長達6個月到2年左右。同時，由于電池時間取決于很多因素，例如：電池種類、容量和應用場合，ZigBee技術在協議上對電池使用也作了優化。對于典型應用，堿性電池可以使用數年，對于某些工作時間和總時間（工作時間+休眠時間）之比小于1%的情況，電池的壽命甚至可以超過10年。 數據傳輸可靠：ZigBee的媒體接入控制層（MAC層）采用talk-when-ready的碰撞避免機制。在這種完全確認的數據傳輸機制下，當有數據傳送需求時則立刻傳送，發送的每個數據包都必須等待接收方的確認信息，并進行確認信息回復，若沒有得到確認信息的回復就表示發生了碰撞，將再傳一次，采用這種方法可以提高系統信息傳輸的可靠性。同時為需要固定帶寬的通信業務預留了專用時隙，避免了發送數據時的競爭和沖突。同時ZigBee針對時延敏感的應用做了優化，通信時延和休眠狀態激活的時延都非常短。 網絡容量大：ZigBee低速率、低功耗和短距離傳輸的特點使它非常適宜支持簡單器件。ZigBee定義了兩種器件：全功能器件（FFD）和簡化功能器件（RFD）。對全功能器件，要求它支持所有的49個基本參數。而對簡化功能器件，在最小配置時只要求它支持38個基本參數。一個全功能器件可以與簡化功能器件和其他全功能器件通話，可以按3種方式工作，分別為：個域網協調器、協調器或器件。而簡化功能器件只能與全功能器件通話，僅用于非常簡單的應用。一個ZigBee的網絡最多包括有255個ZigBee網路節點，其中一個是主控（Master）設備，其余則是從屬（SLAVE）設備。若是通過網絡協調器（Network Coordinator），整個網絡最多可以支持超過64000個ZigBee網路節點，再加上各個Network Coordinator可互相連接，整個ZigBee網絡節點的數目將十分可觀。 兼容性：ZigBee技術與現有的控制網絡標準無縫集成。通過網絡協調器（Coordinator）自動建立網絡，采用載波偵聽/沖突檢測（CSMA-CA）方式進行信道接入。為了可靠傳遞，還提供全握手協議。
標簽： zigbee
上傳時間： 2013-11-24
上傳用戶：siguazgb
3 FPGA設計流程 完整的FPGA 設計流程包括邏輯電路設計輸入、功能仿真、綜合及時序分析、實現、加載配置、調試。FPGA 配置就是將特定的應用程序設計按FPGA設計流程轉化為數據位流加載到FPGA 的內部存儲器中，實現特定邏輯功能的過程。由于FPGA 電路的內部存儲器都是基于RAM 工藝的，所以當FPGA電路電源掉電后，內部存儲器中已加載的位流數據將隨之丟失。所以，通常將設計完成的FPGA 位流數據存于外部存儲器中，每次上電自動進行FPGA電路配置加載。 4 FPGA配置原理 以Xilinx公司的Qpro Virtex Hi-Rel系列XQV100電路為例，FPGA的配置模式有四種方案可選擇：MasterSerial Mode，SLAVE Serial Mode，Master selectMAPMode，SLAVE selectMAP Mode。配置是通過芯片上的一組專/ 復用引腳信號完成的，主要配置功能信號如下： (1)M0、M1、M2：下載配置模式選擇; (2)CLK：配置時鐘信號; (3)DONE：顯示配置狀態、控制器件啟動;
上傳時間： 2013-11-18
上傳用戶：oojj
