The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video. Hardware reference
標(biāo)簽： bottleneck developed the concept
上傳時間： 2016-03-18
上傳用戶：極客
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video. User Manual
標(biāo)簽： bottleneck developed the concept
上傳時間： 2014-01-15
上傳用戶：努力努力再努力
這是一個關(guān)于PLC-BUS智能家居控制系統(tǒng)的應(yīng)用.
標(biāo)簽： PLC-BUS 智能家居控制系統(tǒng)
上傳時間： 2013-12-08
上傳用戶：shawvi
Universal Serial Bus Specification
標(biāo)簽： Specification Universal Serial Bus
上傳時間： 2014-11-27
上傳用戶：wanqunsheng
xilinx reference design for 1553B BUS analyer using
標(biāo)簽： reference analyer xilinx design
上傳時間： 2013-12-01
上傳用戶：bibirnovis
PCI設(shè)計指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.
標(biāo)簽： interface PCI pre-implemented LogiCORE
上傳時間： 2016-04-03
上傳用戶：清風(fēng)冷雨
The I2C-bus specification 由于大規(guī)模集成電路技術(shù)的發(fā)展，在單個芯片集成CPU以及組成一個單獨工作系統(tǒng)所必須的ROM、RAM、I/O端口、A/D、D/A等外圍電路和已經(jīng)實現(xiàn)，這就是常說的單片機(jī)或微控制器。目前，世界上許多公司生產(chǎn)單片機(jī)，品種很多：包括各種字長的CPU，各種容量和品種的ROM、RAM，以及功能各異的I/O等等。但是，單片機(jī)品種規(guī)格有限，所以只能選用某種單片機(jī)再進(jìn)行擴(kuò)展。擴(kuò)展的方法有兩種：一種是并行總線，另一種是串行總線。由于串行總線連線少，結(jié)構(gòu)簡單，往往不用專用的母板和插座而直接用導(dǎo)線連接各個設(shè)備即可。因此，采用串行總線大大簡化了系統(tǒng)硬件設(shè)計。PHILIPS公司早在十幾年就前推出了I2C串行總線，它是具備多主機(jī)系統(tǒng)所需的包括裁決和高低速設(shè)備同步等功能的高性能串行總線。
標(biāo)簽： specification C-bus The 大規(guī)模
上傳時間： 2013-12-28
上傳用戶：windwolf2000
CAN-bus規(guī)范V2.0版本，現(xiàn)在很多地方都用到的CAN-bus，希望對同學(xué)們有用。
上傳時間： 2016-04-10
上傳用戶：cooran
CAN-bus現(xiàn)場總線應(yīng)用方案-汽車電子篇，希望對同學(xué)們有用。
標(biāo)簽： CAN-bus 現(xiàn)場總線 方案 汽車電子
上傳時間： 2016-04-10
上傳用戶：windwolf2000
How to use the TWI bus with a AVR cpu
上傳時間： 2016-04-13
上傳用戶：songnanhua
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