A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier Board to bring out I/O and to power up. COMs are used to build single board computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry standard for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.
上傳時(shí)間： 2013-11-05
上傳用戶：Wwill
The CC1101 is a low-cost sub- 1 GHztransceiver designed for very low-powerwireless applications. The circuit is mainlyintended for the ISM (Industrial, Scientific andMedical) and SRD (Short Range Device)frequency bands at 315, 433, 868, and 915MHz, but can easily be programmed foroperation at other frequencies in the 300-348MHz, 387-464 MHz and 779-928 MHz bands.CC1101 is an improved and code compatibleversion of the CC1100 RF transceiver. Themain improvements on the CC1101 include:
標(biāo)簽： 1110 CC 片上系統(tǒng) 方案
上傳時(shí)間： 2013-11-12
上傳用戶：363186
Linear Technology offers some of the highest performance RF and signal chain solutions for wireless and cellularinfrastructure. These products support worldwide standards including, LTE, WiMAX, GSM,W-CDMA, TD-SCDMA,CDMA, and CDMA2000. Other wireless systems include broadband microwave data links, secure communications,satellite receivers, broadband wireless access, wireless broadcast systems, RFID readers and cable infrastructure
上傳時(shí)間： 2013-11-04
上傳用戶：kiklkook
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
標(biāo)簽： Cortex-M 1850 LPC 內(nèi)核微控制器
上傳時(shí)間： 2014-12-31
上傳用戶：zhuoying119
The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
上傳時(shí)間： 2013-10-28
上傳用戶：15501536189
The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, industrial, medical, and communicationmarkets. To optimize system power consumption, the LPC315x have multiple powerdomains and a very flexible Clock Generation Unit (CGU) that provides dynamic clockgating and scaling.The LPC315x is implemented as multi-chip module with two side-by-side dies, one fordigital fuctions and one for analog functions, which include a Power Supply Unit (PSU),audio codec, RTC, and Li-ion battery charger.
上傳時(shí)間： 2014-01-17
上傳用戶：Altman
This book evolved over the past ten years from a set of lecture notes developed while teaching the undergraduate Algorithms course at Berkeley and U.C. San Diego. Our way of teaching this course evolved tremendously over these years in a number of directions, partly to address our students' background (undeveloped formal skills outside of programming), and partly to reect the maturing of the eld in general, as we have come to see it. The notes increasingly crystallized into a narrative, and we progressively structured the course to emphasize the ?story line? implicit in the progression of the material. As a result, the topics were carefully selected and clustered. No attempt was made to be encyclopedic, and this freed us to include topics traditionally de-emphasized or omitted from most Algorithms books.
標(biāo)簽： Algorithms 算法
上傳時(shí)間： 2013-11-11
上傳用戶：JamesB
簡(jiǎn)單電子琴的51單片機(jī)程序 #include<reg51.h> //包含51單片機(jī)寄存器定義的頭文件 sbit P14=P1^4; //將P14位定義為P1.4引腳 sbit P15=P1^5; //將P15位定義為P1.5引腳 sbit P16=P1^6; //將P16位定義為P1.6引腳 sbit P17=P1^7; //將P17位定義為P1.7引腳 unsigned char keyval; //定義變量?jī)?chǔ)存按鍵值 sbit sound=P2^0; //將sound定義為P2.0 unsigned int C; //全局變量，儲(chǔ)存定時(shí)器的定時(shí)常數(shù) unsigned int f; //全局變量，儲(chǔ)存音階的頻率 //以下是C調(diào)低音的音頻宏定義 #define l_dao 262 //將“l_dao”宏定義為低音“1”的頻率262Hz #define l_re 294 //將“l_re” 宏定義為低音“2”的頻率294Hz #define l_mi 330 //將“l_mi” 宏定義為低音“3”的頻率330Hz #define l_fa 349 //將“l_fa” 宏定義為低音“4”的頻率349Hz #define l_sao 392 //將“l_sao”宏定義為低音“5”的頻率392Hz #define l_la 440 //將“l_la” 宏定義為低音“6”的頻率440Hz #define l_xi 494 //將“l_xi” 宏定義為低音“7”的頻率494Hz //以下是C調(diào)中音的音頻宏定義 #define dao 523 //將“dao”宏定義為低音“1”的頻率Hz #define re 587 //將“re” 宏定義為低音“2”的頻率Hz #define mi 659 //將“mi” 宏定義為低音“3”的頻率Hz #define fa 698 //將“fa” 宏定義為低音“4”的頻率Hz #define sao 784 //將“sao”宏定義為低音“5”的頻率Hz #define la 880 //將“la” 宏定義為低音“6”的頻率Hz #define xi 988 //將“xi” 宏定義為低音“7”的頻率Hz
上傳時(shí)間： 2013-11-09
上傳用戶：tian126vip
解壓包包含了C語言入門經(jīng)典教程和Visuak c++軟件 【基本簡(jiǎn)介】 Visual C++是一個(gè)功能強(qiáng)大的可視化軟件開發(fā)工具。自1993年Microsoft公司推出Visual C++1.0后，隨著其新版本的不斷問世，Visual C++已成為專業(yè)程序員進(jìn)行軟件開發(fā)的首選工具。 雖然微軟公司推出了Visual C++.NET(Visual C++7.0)，但它的應(yīng)用的很大的局限性，只適用于Windows 2000,Windows XP和Windows NT4.0。所以實(shí)際中，更多的是以Visual C++6.0為平臺(tái)。 Visual C++6.0不僅是一個(gè)C++編譯器，而且是一個(gè)基于Windows操作系統(tǒng)的可視化集成開發(fā)環(huán)境（integrated development environment,IDE）。Visual C++6.0由許多組件組成，包括編輯器、調(diào)試器以及程序向?qū)ppWizard、類向?qū)lass Wizard等開發(fā)工具。 這些組件通過一個(gè)名為Developer Studio的組件集成為和諧的開發(fā)環(huán)境。 在Visual C++ 6.0 企業(yè)版的基礎(chǔ)上集成官方的SP6升級(jí)補(bǔ)丁制作而成！免序列號(hào)，安裝完即可使用，無需再打補(bǔ)丁！ 【使用方法】 有些朋友反應(yīng)在安裝后出現(xiàn) "Error spawning error" 可以看看下面綠色軟件找到的一些解決方案： 點(diǎn)擊VC“TOOLS（工具）”—>“Option（選擇）”—>“Directories（目錄）”重新設(shè)置“Excutable Fils、Include Files、Library Files、Source Files”的路徑。很多情況可能就一個(gè)盤符的不同（例如你的VC裝在C，但是這些路徑全部在D），改過來就OK了。
標(biāo)簽： C語言 程序設(shè)計(jì) 軟件
上傳時(shí)間： 2013-10-09
上傳用戶：hui626493
C語言函數(shù)大全，已包含絕大部分的函數(shù)。每個(gè)函數(shù)包含函數(shù)名，功能，用法，舉例，內(nèi)容詳盡。希望對(duì)大家有所幫助~~ 函數(shù)名: abort 功 能: 異常終止一個(gè)進(jìn)程 用 法: void abort(void); 程序例: #include #include int main(void) { printf("Calling abort()\n"); abort(); return 0; /* This is never reached */ } 函數(shù)名: abs 功 能: 求整數(shù)的絕對(duì)值 用 法: int abs(int i); 程序例: #include #include int main(void) { int number = -1234; printf("number: %d absolute value: %d\n", number, abs(number)); return 0; }
上傳時(shí)間： 2013-12-06
上傳用戶：feifei0302
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