Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-level book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary.Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communications.The circuits usually used have evolved through experience, without asatisfying intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anintellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise.
標(biāo)簽： Rogers Radio John Freq
上傳時(shí)間： 2014-12-23
上傳用戶：han_zh
The CN3052A is a complete constant-current /constant voltage linear charger for single cell Li-ion and Li Polymer rechargeable batteries. The device contains an on-chip power MOSFET and eliminates the need for the external sense resistor and blocking diode.
上傳時(shí)間： 2013-11-10
上傳用戶：子虛烏有
數(shù)字控制的交流調(diào)速系統(tǒng)所選用的微處理器、功率器件及產(chǎn)生PWM波的方法是影響交流調(diào)速系統(tǒng)性能好壞的直接因素。在介紹了正弦脈寬調(diào)制(SPWM)技術(shù)的基礎(chǔ)上，設(shè)計(jì)了一種以8098單片機(jī)作為控制器，以智能功率模塊IPM為開關(guān)器件的變頻調(diào)速系統(tǒng)。通過軟件編程，產(chǎn)生正弦脈沖寬度調(diào)制波形來控制絕緣柵雙極晶體管的導(dǎo)通和關(guān)斷，從而達(dá)到控制異步電動(dòng)機(jī)轉(zhuǎn)速的目的。實(shí)驗(yàn)結(jié)果表明，該系統(tǒng)可調(diào)頻率調(diào)電壓，穩(wěn)定度高，調(diào)速范圍寬，具有較強(qiáng)的實(shí)用價(jià)值 Abstract: AC variable speed with digital control systems used microprocessors， power devices and generate PWM wave is the direct factors of affecting the performance AC speed regulation system. On the basis of introducing the sinusoidal pulse width modulation (SPWM) technology，this paper designed variable speed system which used 8098 as a controller， intelligent power module IPM as switching device. Through software programming， resulting in sinusoidal pulse width modulation waveform to control the insulated gate bipolar transistor turn on and off， so as to achieve the purpose of speed control of induction motors. Experimental results show that the system can adjust frequency modulation voltage， high stability， wide speed range， has a strong practical value.
標(biāo)簽： 8098 SPWM 單片機(jī) 變頻調(diào)速系統(tǒng)
上傳時(shí)間： 2013-11-14
上傳用戶：ynwbosss
MG3500SoC是支持H.264高清編解碼器的片上系統(tǒng)，內(nèi)部集成一個(gè)嵌入式ARM926處理器，支持高清H.264編解碼、MPEG鄄2解碼和JPEG編解碼。介紹了MG3500SoC的主要性能特點(diǎn)、引腳排列、主要接口功能及在DVR上的應(yīng)用，以及MG3500SoC及其周圍器件的硬件設(shè)計(jì)，提出了在設(shè)計(jì)中應(yīng)注意的問題。 Abstract: The MG3500SYstem-on-chip（SoC）is high definition（HD）H.264codec,including ARM926-EJ processor，H.264encoder/decoder，MPEG2decoder and JPEG/MJPEG encoder/decoder.The features,pin assignments，interfaces and the typical application of MG3500in DVR are introduced in this paper.The application hardware circuit between the MG3500SoC and peripheral device are given,the questions which the syetem design needs to pay attention are explained.
上傳時(shí)間： 2013-11-12
上傳用戶：elinuxzj
1 FEATURES· Single chip LCD controller/driver· 1 or 2-line display of up to 24 characters per line, or2 or 4 lines of up to 12 characters per line· 5 ′ 7 character format plus cursor; 5 ′ 8 for kana(Japanese syllabary) and user defined symbols· On-chip:– generation of LCD supply voltage (external supplyalso possible)– generation of intermediate LCD bias voltages– oscillator requires no external components (externalclock also possible)· Display data RAM: 80 characters· Character generator ROM: 240 characters· Character generator RAM: 16 characters· 4 or 8-bit parallel bus or 2-wire I2C-bus interface· CMOS/TTL compatible· 32 row, 60 column outputs· MUX rates 1 : 32 and 1 : 16· Uses common 11 code instruction set· Logic supply voltage range, VDD - VSS: 2.5 to 6 V· Display supply voltage range, VDD - VLCD: 3.5 to 9 V· Low power consumption· I2C-bus address: 011101 SA0.
標(biāo)簽： 2116 PCF LCD 驅(qū)動(dòng)器芯片
上傳時(shí)間： 2013-11-08
上傳用戶：laozhanshi111
The CAT93C46 is a 1 kb Serial EEPROM memory device which isconfigured as either 64 registers of 16 bits (ORG pin at VCC) or 128registers of 8 bits (ORG pin at GND). Each register can be written (orread) serially by using the DI (or DO) pin. The CAT93C46 features aself−timed internal write with auto−clear. On−chip Power−On Resetcircuit protects the internal logic against powering up in the wrongstate.
上傳時(shí)間： 2013-11-20
上傳用戶：ynzfm
可編程系統(tǒng)級(jí)芯片提供了最大設(shè)計(jì)的靈活性 極端靈活且完全可編程的混合信號(hào)SOC 的基本原理是促使賽普拉斯微系統(tǒng)公司（Cypress MicroSystems）推出名為PSoCTM（Programmable SYstem-on-chipTM，可編程系統(tǒng)級(jí)芯片）的全新一代器件的動(dòng)力所在。
標(biāo)簽： 可編程 系統(tǒng)級(jí)芯片
上傳時(shí)間： 2013-10-22
上傳用戶：playboys0
The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after theboot process has completed.
標(biāo)簽： Stellaris Clocking Options for
上傳時(shí)間： 2013-10-14
上傳用戶：pol123
The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.
標(biāo)簽： synchronous Emulating serial
上傳時(shí)間： 2014-01-31
上傳用戶：z1191176801
用C51寫的普通拼音輸入法源程序代碼:原作使用了一個(gè)二維數(shù)組用以查表，我認(rèn)為這樣比較的浪費(fèi)空間，而且每個(gè)字表的索引地址要手工輸入，效率不高。所以我用結(jié)構(gòu)體將其改寫了一下。就是大家現(xiàn)在看到的這個(gè)。 因?yàn)榇a比較的大，共有6,000多漢字，這樣就得要12,000 byte來存放GB內(nèi)碼，所以也是沒辦法的.編譯結(jié)果約為3000h,因?yàn)榇蟛糠质撬饕恚a優(yōu)化幾乎無效。 在Keil C里仿真芯片選用的是華邦的W77E58，它有32k ROM, 256B on-chip RAM, 1K on-chip SRAM (用DPTR1指針尋址,相當(dāng)于有1K的片上xdata)。條件有限，沒有上片試驗(yàn)，仿真而已。 打算將其移植到AVR上，但CodeAVRC與IAR EC++在結(jié)構(gòu)體、指針的定義使用上似乎與C51不太一樣，現(xiàn)在還未搞定。還希望在這方面有經(jīng)驗(yàn)的網(wǎng)友能給予指導(dǎo)。 #include<stdio.h> char * py_ime(char *); void main(void){ while(1) { char input_string[]="yI"; xdata char chinese_string[255]; sprintf(chinese_string,"%s",py_ime(input_string)); }}
上傳時(shí)間： 2013-10-30
上傳用戶：cainaifa
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