All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上傳時間： 2014-04-02
上傳用戶：han_zh
The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
上傳時間： 2014-01-24
上傳用戶：zl5712176
賽靈思正式發貨全球首款異構 3D FPGA，為 Nx100G 和 400G 線路卡解決方案帶來突破性集成能力
標簽： HT_Press_Pitch-Chinese-final Virtex
上傳時間： 2013-10-11
上傳用戶：13033095779
The Virtex™-4 user access register (USR_ACCESS_VIRTEX4) is a 32-bit register thatprovides direct access to bitstream data by the FPGA fabric. It is useful for loadingPowerPC™ 405 (PPC405) processor caches and/or other data into the FPGA after the FPGAhas been configured, thus achieving partial reconfiguration. The USR_ACCESS_VIRTEX4register is programmed through the bitstream with a command that writes a series of 32-bitwords.
標簽： USR_ACCESS PowerPC XAPP 719
上傳時間： 2013-11-13
上傳用戶：我累個乖乖
XAPP520將符合2.5V和3.3V I/O標準的7系列FPGA高性能I/O Bank進行連接 The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation between 1.2V and 1.8V. In circumstances that require an HP 1.8V I/O bank to interface with 2.5V or 3.3V logic, a range of options can be deployed. This application note describes methodologies for interfacing 7 series HP I/O banks with 2.5V and 3.3V systems
上傳時間： 2013-11-19
上傳用戶：yyyyyyyyyy
本文主要通過介紹PLC通訊的意義和三菱FX系列PLC的四種通訊方式，并重點介紹FX系列PLC與計算機無協議通訊，主要從無協議通訊的硬件、配線、數據寄存器設置、PLC與計算機無協議通訊的指令用法、PLC程序編寫和計算機VB程序的編寫來說明無協議通訊的過程和一般方法。 My dissertation introduces the significance of PLC communications and the four means of communication of Mitsubishi FX’s PLC, And highlights the no protocol communications of FX series PLC and computer, no protocol communications hardware, wiring, Register data set, and the usage of command about no protocol communications, How to write PLC program and computer VB program to illustrate the process of no protocol communications and general method.
上傳時間： 2014-11-29
上傳用戶：Jerry_Chow
ARM is the world’s leading semiconductor IP company with 22 Million processors entering the market each day.
標簽： Development_FSL Embedded Kinetis Series
上傳時間： 2013-11-01
上傳用戶：kaixinxin196
西門子PLC S7-200編程軟件最新版本(2012.3) STEP7 MicroWIN_V4 SP9 完整版, 全面支持Windows7。安裝完后，打開軟件，初次為英文版，點擊tools（左上角自左-右第6個）然后選擇最下面的options（自上而下第15個）單擊，出現又一個畫面，在左邊選擇第一個選項General，就出現了語言選項，選擇最下面的那個（Chinese）也就是中文。然后點擊OK按鈕，然后一路回車下去，直到軟件關閉，再打開時就是中文的啦！
上傳時間： 2013-11-19
上傳用戶：mikesering
安裝方法： 1.查找你機器的“網絡標識”(計算機名稱)。方法是，鼠標在桌面上點 我的電腦--->屬性(右鍵)--->計算機名--->完整的計算機名稱,把名稱抄下備用，不要最后那個“點”。 2.進入安裝包內MAGNiTUDE文件夾，用記事本打開nx6.lic, 將第1行中的this_host用你機子的計算機名替換,例如我的機子完整的計算機名稱NET 則改為SERVER NET ID=20080618 28000(原來為SERVER this_host ID=20080618 28000),改好后存盤備用。 首先你找到MAGNiTUDE下的UG6.LIC并用記事本打開，把里面的his_host改成你的計算機名，注意一個字母都不能錯，然后另存一個地方，等會兒要用。接下來安裝 1.雙擊打開Launch.exe 2. 選擇第2項“Install License Server安裝 3.在這里可以選擇安裝介面的語言。默認為中文簡體。 4. 在安裝過程中會提示你尋找license文件，點擊NEXT會出錯,這時使用瀏覽(Browse)來找到你剛才改過的那個LIC文件就可以了。繼續安裝直到結束,目錄路徑不要 改變,機器默認就行,（建議默認，也可放在其它的盤，但路徑不能用中文）。 （可以先不進行括號中的內容，為了防止語言出現錯誤，建議運行DEMO32，然后選擇文件類型為所有，找到你改過的LIC文件，再進行下面的步驟。） 5. 選擇第2項“Install NX進行主程序安裝。 6. 直接點擊下一步。并選擇典型方式安裝,下一步,會出現語言選擇畫面,請選 擇 Simplified Chinese(簡體中文版),默認為英文版。按提示一步一步安裝直到結束。 安裝路 徑可以改變。 7.打開MAGNiTUDE文件夾。 8. 進入MAGNiTUDE文件夾，把UGS\NX6.0文件夾的幾個子文件夾復制到安裝NX6.0主程序相應的目錄 下，覆蓋。假如安裝到D:\Program Files\UGS\NX 6.0 把NX6.0文件夾內的所有文件夾復制到D:\Program Files\UGS\NX 6.0文件夾相應的文件 進行覆蓋就可以。 9. 進入開始-程序-UGS NX6.0-NX6.0打開6.0程序。 注：如果打不開，請按以下步驟操作 進入開始-程序-UGS NX6.0-NX6.0許可程序，打開lmtools,啟動服務程序。選擇 Start/stop/reread，點一下Stop Server， 再點Start Server，最下面一行顯示Server Start Successful. 就OK，然后打開桌面NX6.0。 經過我的實踐，絕對可行！
上傳時間： 2013-11-09
上傳用戶：qoovoop
安裝方法： 1.查找你機器的“網絡標識”(計算機名稱)。方法是，鼠標在桌面上點 我的電腦--->屬性(右鍵)--->計算機名--->完整的計算機名稱,把名稱抄下備用，不要最后那個“點”。 2.進入安裝包內MAGNiTUDE文件夾，用記事本打開nx6.lic, 將第1行中的this_host用你機子的計算機名替換,例如我的機子完整的計算機名稱NET 則改為SERVER NET ID=20080618 28000(原來為SERVER this_host ID=20080618 28000),改好后存盤備用。 首先你找到MAGNiTUDE下的UG6.LIC并用記事本打開，把里面的his_host改成你的計算機名，注意一個字母都不能錯，然后另存一個地方，等會兒要用。接下來安裝 1.雙擊打開Launch.exe 2. 選擇第2項“Install License Server安裝 3.在這里可以選擇安裝介面的語言。默認為中文簡體。 4. 在安裝過程中會提示你尋找license文件，點擊NEXT會出錯,這時使用瀏覽(Browse)來找到你剛才改過的那個LIC文件就可以了。繼續安裝直到結束,目錄路徑不要 改變,機器默認就行,（建議默認，也可放在其它的盤，但路徑不能用中文）。 （可以先不進行括號中的內容，為了防止語言出現錯誤，建議運行DEMO32，然后選擇文件類型為所有，找到你改過的LIC文件，再進行下面的步驟。） 5. 選擇第2項“Install NX進行主程序安裝。 6. 直接點擊下一步。并選擇典型方式安裝,下一步,會出現語言選擇畫面,請選 擇 Simplified Chinese(簡體中文版),默認為英文版。按提示一步一步安裝直到結束。 安裝路 徑可以改變。 7.打開MAGNiTUDE文件夾。 8. 進入MAGNiTUDE文件夾，把UGS\NX6.0文件夾的幾個子文件夾復制到安裝NX6.0主程序相應的目錄 下，覆蓋。假如安裝到D:\Program Files\UGS\NX 6.0 把NX6.0文件夾內的所有文件夾復制到D:\Program Files\UGS\NX 6.0文件夾相應的文件 進行覆蓋就可以。 9. 進入開始-程序-UGS NX6.0-NX6.0打開6.0程序。 注：如果打不開，請按以下步驟操作 進入開始-程序-UGS NX6.0-NX6.0許可程序，打開lmtools,啟動服務程序。選擇 Start/stop/reread，點一下Stop Server， 再點Start Server，最下面一行顯示Server Start Successful. 就OK，然后打開桌面NX6.0。 經過我的實踐，絕對可行！
上傳時間： 2013-11-12
上傳用戶：sjw920325
