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<li id="wskqq"></li> fpga this will help you to improve you ability
標(biāo)簽： you ability improve fpga
上傳時(shí)間： 2016-08-04
上傳用戶：asasasas
This project allows you to learn communication systems in greater depth. It contains the Simulink files (*.mdl) which are block design files of various communication systems such as AM, DSB-SC, FM, PLL, Data Acquisition, Digital Data Transmission, PCM and Delta Modulation. The idea here is to implement experiments of a traditional communication lab using Simulink. Most of the block diagrams are self explanatory. More information on the systems and their implementation can be found in the word documents included in the lab directories
標(biāo)簽： communication Simulink contains project
上傳時(shí)間： 2013-12-09
上傳用戶：lz4v4
FPGA to design in ECU, very help for engineer
標(biāo)簽： engineer design FPGA help
上傳時(shí)間： 2013-12-27
上傳用戶：onewq
library of aircraft models to be used with Simulink
標(biāo)簽： aircraft Simulink library models
上傳時(shí)間： 2016-11-17
上傳用戶：黃華強(qiáng)
Xilinx的FPGA 中的matlab simulink建模，內(nèi)有幾種調(diào)制方式，比如QPSK等
標(biāo)簽： simulink Xilinx matlab FPGA
上傳時(shí)間： 2014-01-14
上傳用戶：lunshaomo
采用FPGA實(shí)現(xiàn)色彩空間轉(zhuǎn)換R’G’B’ to Y’CbCr的VHDL和verilog源代碼,支持xilinx的各種器件.
標(biāo)簽： verilog xilinx FPGA CbCr
上傳時(shí)間： 2013-12-12
上傳用戶：lps11188
how to infer ram for fpga altera xilinx
標(biāo)簽： altera xilinx infer fpga
上傳時(shí)間： 2013-12-25
上傳用戶：dongbaobao
How to infer a finite state machine for fpga altera xilinx
標(biāo)簽： machine finite altera xilinx
上傳時(shí)間： 2014-01-10
上傳用戶：鳳臨西北
how to infer a shift register for fpga altera xilinx
標(biāo)簽： register altera xilinx infer
上傳時(shí)間： 2014-01-22
上傳用戶：zl5712176
I2C core code in Hardware descrption language so as enable a cpld/fpga to be programmed for specific customized applications of our requirment & make the pcb work to meet the application requirements.
標(biāo)簽： descrption programmed Hardware language
上傳時(shí)間： 2014-12-20
上傳用戶：許小華
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