This application note shows how to write an Inter Integrated Circuit bus driver (I²C) for the Philips P90CL301micro-controller.It is not only an example of writing a driver, but it also includes a set of application interface software routines toquickly implement a complete I²C multi-master system application.For specific applications the user will have to make minimal changes in the driver program. Using the drivermeans linking modules to your application software and including a header-file into the application sourceprograms. A small example program of how to use the driver is listed.The driver supports i.a. polled or interrupt driven message handling, slave message transfers and multi-mastersystem applications. Furthermore, it is made suitable for use in conjunction with real time operating systems, likepSOS+.
上傳時間： 2013-11-23
上傳用戶：weixiao99
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上傳時間： 2013-10-23
上傳用戶：copu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上傳時間： 2014-04-02
上傳用戶：han_zh
This application note demonstrates how to write an Inter Integrated Circuit bus driver (I2C) for the XA-S3 16-bitMicrocontroller from Philips Semiconductors.Not only the driver software is given. This note also contains a set of (example) interface routines and a smalldemo application program. All together it offers the user a quick start in writing a complete I2C system applicationwith the PXAS3x.The driver routines support interrupt driven single master transfers. Furthermore, the routines are suitable foruse in conjunction with real time operating systems.
上傳時間： 2013-11-02
上傳用戶：zw380105939
The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we show anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. Switching between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.
上傳時間： 2013-11-19
上傳用戶：shirleyYim
I2C interface, is a very powerful tool for system designers. Theintegrated protocols allow systems to be completely software defined.Software development time of different products can be reduced byassembling a library of reusable software modules. In addition, themultimaster capability allows rapid testing and alignment ofend-products via external connections to an assembly-line computer.The mask programmable 87LPC76X and its EPROM version, the87LPC76X, can operate as a master or a slave device on the I2Csmall area network. In addition to the efficient interface to thededicated function ICs in the I2C family, the on-board interfacefacilities I/O and RAM expansion, access to EEPROM andprocessor-to-processor communications.
標簽： microcontro Using 76X LPC
上傳時間： 2013-12-30
上傳用戶：Artemis
According to CIBC World Markets, Equity Research, theFlat Panel Display (FPD) industry has achieved sufficientcritical mass for its growth to explode. Thus, it can nowattract the right blend of capital investments and R&Dresources to drive technical innovation toward continuousimprovement in view quality, manufacturing efficiency,and system integration. These in turn are sustainingconsumer interest, penetration, revenue growth, and thepotential for increasing long-term profitability for industryparticipants. CIBC believes that three essential conditionsare now converging to drive the market forward
上傳時間： 2013-10-18
上傳用戶：日光微瀾
很多不同的廠家生產(chǎn)各種型號的計算機，它們運行完全不同的操作系統(tǒng)，但TCP.IP協(xié)議族允許它們互相進行通信。這一點很讓人感到吃驚，因為它的作用已遠遠超出了起初的設(shè)想。T C P / I P起源于6 0年代末美國政府資助的一個分組交換網(wǎng)絡(luò)研究項目，到9 0年代已發(fā)展成為計算機之間最常應(yīng)用的組網(wǎng)形式。它是一個真正的開放系統(tǒng)，因為協(xié)議族的定義及其多種實現(xiàn)可以不用花錢或花很少的錢就可以公開地得到。它成為被稱作“全球互聯(lián)網(wǎng)”或“因特網(wǎng)(Internet)”的基礎(chǔ)，該廣域網(wǎng)（WA N）已包含超過1 0 0萬臺遍布世界各地的計算機。本章主要對T C P / I P協(xié)議族進行概述，其目的是為本書其余章節(jié)提供充分的背景知識。 TCP.IP協(xié)議 縮略語 ACK (ACKnowledgment) TCP首部中的確認標志 API (Application Programming Interface) 應(yīng)用編程接口 ARP (Address Resolution Protocol) 地址解析協(xié)議 ARPANET(Defense Advanced Research Project Agency NETwork) (美國)國防部遠景研究規(guī)劃局 AS (Autonomous System) 自治系統(tǒng) ASCII (American Standard Code for Information Interchange) 美國信息交換標準碼 ASN.1 (Abstract Syntax Notation One) 抽象語法記法1 BER (Basic Encoding Rule) 基本編碼規(guī)則 BGP (Border Gateway Protocol) 邊界網(wǎng)關(guān)協(xié)議 BIND (Berkeley Internet Name Domain) 伯克利I n t e r n e t域名 BOOTP (BOOTstrap Protocol) 引導(dǎo)程序協(xié)議 BPF (BSD Packet Filter) BSD 分組過濾器 CIDR (Classless InterDomain Routing) 無類型域間選路 CIX (Commercial Internet Exchange) 商業(yè)互聯(lián)網(wǎng)交換 CLNP (ConnectionLess Network Protocol) 無連接網(wǎng)絡(luò)協(xié)議 CRC (Cyclic Redundancy Check) 循環(huán)冗余檢驗 CSLIP (Compressed SLIP) 壓縮的S L I P CSMA (Carrier Sense Multiple Access) 載波偵聽多路存取 DCE (Data Circuit-terminating Equipment) 數(shù)據(jù)電路端接設(shè)備 DDN (Defense Data Network) 國防數(shù)據(jù)網(wǎng) DF (Don’t Fragment) IP首部中的不分片標志 DHCP (Dynamic Host Configuration Protocol) 動態(tài)主機配置協(xié)議 DLPI (Data Link Provider Interface) 數(shù)據(jù)鏈路提供者接口 DNS (Domain Name System) 域名系統(tǒng) DSAP (Destination Service Access Point) 目的服務(wù)訪問點 DSLAM (DSL Access Multiplexer) 數(shù)字用戶線接入復(fù)用器 DSSS (Direct Sequence Spread Spectrum) 直接序列擴頻 DTS (Distributed Time Service) 分布式時間服務(wù) DVMRP (Distance Vector Multicast Routing Protocol) 距離向量多播選路協(xié)議 EBONE (European IP BackbONE) 歐洲I P主干網(wǎng) EOL (End of Option List) 選項清單結(jié)束 EGP (External Gateway Protocol) 外部網(wǎng)關(guān)協(xié)議 EIA (Electronic Industries Association) 美國電子工業(yè)協(xié)會 FCS (Frame Check Sequence) 幀檢驗序列 FDDI (Fiber Distributed Data Interface) 光纖分布式數(shù)據(jù)接口 FIFO (First In, First Out) 先進先出 FIN (FINish) TCP首部中的結(jié)束標志 FQDN (Full Qualified Domain Name) 完全合格的域名 FTP (File Transfer Protocol) 文件傳送協(xié)議 HDLC (High-level Data Link Control) 高級數(shù)據(jù)鏈路控制 HELLO 選路協(xié)議 IAB (Internet Architecture Board) Internet體系結(jié)構(gòu)委員會 IANA (Internet Assigned Numbers Authority) Internet號分配機構(gòu) ICMP (Internet Control Message Protocol) Internet控制報文協(xié)議 IDRP (InterDomain Routing Protocol) 域間選路協(xié)議 IEEE (Institute of Electrical and Electronics Engineering) （美國）電氣與電子工程師協(xié)會 IEN (Internet Experiment Notes) 互聯(lián)網(wǎng)試驗注釋 IESG (Internet Engineering Steering Group) Internet工程指導(dǎo)小組 IETF (Internet Engineering Task Force) Internet工程專門小組 IGMP (Internet Group Management Protocol) Internet組管理協(xié)議 IGP (Interior Gateway Protocol) 內(nèi)部網(wǎng)關(guān)協(xié)議 IMAP (Internet Message Access Protocol) Internet報文存取協(xié)議 IP (Internet Protocol) 網(wǎng)際協(xié)議 I RTF (Internet Research Task Force) Internet研究專門小組 IS-IS (Intermediate System to Intermediate System Protocol) 中間系統(tǒng)到中間系統(tǒng)協(xié)議 ISN (Initial Sequence Number) 初始序號 ISO (International Organization for Standardization) 國際標準化組織 ISOC (Internet SOCiety) Internet協(xié)會 LAN (Local Area Network) 局域網(wǎng) LBX (Low Bandwidth X) 低帶寬X LCP (Link Control Protocol) 鏈路控制協(xié)議 LFN (Long Fat Net) 長肥網(wǎng)絡(luò) LIFO (Last In, First Out) 后進先出 LLC (Logical Link Control) 邏輯鏈路控制 LSRR (Loose Source and Record Route) 寬松的源站及記錄路由 MBONE (Multicast Backbone On the InterNEt) Internet上的多播主干網(wǎng) MIB (Management Information Base) 管理信息庫 MILNET (MILitary NETwork) 軍用網(wǎng) MIME (Multipurpose Internet Mail Extensions) 通用I n t e r n e t郵件擴充 MSL (Maximum Segment Lifetime) 報文段最大生存時間 MSS (Maximum Segment Size) 最大報文段長度 M TA (Message Transfer Agent) 報文傳送代理 MTU (Maximum Transmission Unit) 最大傳輸單元 NCP (Network Control Protocol) 網(wǎng)絡(luò)控制協(xié)議 NFS (Network File System) 網(wǎng)絡(luò)文件系統(tǒng) NIC (Network Information Center) 網(wǎng)絡(luò)信息中心 NIT (Network Interface Tap) 網(wǎng)絡(luò)接口栓（S u n公司的一個程序） NNTP (Network News Transfer Protocol) 網(wǎng)絡(luò)新聞傳送協(xié)議 NOAO (National Optical Astronomy Observatories) 國家光學(xué)天文臺 NOP (No Operation) 無操作 NSFNET (National Science Foundation NETwork) 國家科學(xué)基金網(wǎng)絡(luò) NSI (NASA Science Internet) （美國）國家宇航局I n t e r n e t NTP (Network Time Protocol) 網(wǎng)絡(luò)時間協(xié)議 NVT (Network Virtual Terminal) 網(wǎng)絡(luò)虛擬終端 OSF (Open Software Foudation) 開放軟件基金 OSI (Open Systems Interconnection) 開放系統(tǒng)互連 OSPF (Open Shortest Path First) 開放最短通路優(yōu)先 PAWS (Protection Against Wrapped Sequence number) 防止回繞的序號 PDU (Protocol Data Unit) 協(xié)議數(shù)據(jù)單元 POSIX (Portable Operating System Interface) 可移植操作系統(tǒng)接口 PPP (Point-to-Point Protocol) 點對點協(xié)議 PSH (PuSH) TCP首部中的急迫標志 RARP (Reverse Address Resolution Protocol) 逆地址解析協(xié)議 RFC (Request For Comments) Internet的文檔，其中的少部分成為標準文檔 RIP (Routing Information Protocol) 路由信息協(xié)議 RPC (Remote Procedure Call) 遠程過程調(diào)用 RR (Resource Record) 資源記錄 RST (ReSeT) TCP首部中的復(fù)位標志 RTO (Retransmission Time Out) 重傳超時 RTT (Round-Trip Time) 往返時間 SACK (Selective ACKnowledgment) 有選擇的確認 SLIP (Serial Line Internet Protocol) 串行線路I n t e r n e t協(xié)議 SMI (Structure of Management Information) 管理信息結(jié)構(gòu) SMTP (Simple Mail Transfer Protocol) 簡單郵件傳送協(xié)議 SNMP (Simple Network Management Protocol) 簡單網(wǎng)絡(luò)管理協(xié)議 SSAP (Source Service Access Point) 源服務(wù)訪問點 SSRR (Strict Source and Record Route) 嚴格的源站及記錄路由 SWS (Silly Window Syndrome) 糊涂窗口綜合癥 SYN (SYNchronous) TCP首部中的同步序號標志 TCP (Transmission Control Protocol) 傳輸控制協(xié)議 TFTP (Trivial File Transfer Protocol) 簡單文件傳送協(xié)議 TLI (Transport Layer Interface) 運輸層接口 TTL (Ti m e - To-Live) 生存時間或壽命 TUBA (TCP and UDP with Bigger Addresses) 具有更長地址的T C P和U D P Telnet 遠程終端協(xié)議 UA (User Agent) 用戶代理 UDP (User Datagram Protocol) 用戶數(shù)據(jù)報協(xié)議 URG (URGent) TCP首部中的緊急指針標志 UTC (Coordinated Universal Time) 協(xié)調(diào)的統(tǒng)一時間 UUCP (Unix-to-Unix CoPy) Unix到U n i x的復(fù)制 WAN (Wide Area Network) 廣域網(wǎng) WWW (World Wide Web) 萬維網(wǎng) XDR (eXternal Data Representation) 外部數(shù)據(jù)表示 XID (transaction ID) 事務(wù)標識符 XTI (X/Open Transport Layer Interface) X/ O p e n運輸層接口
上傳時間： 2013-11-13
上傳用戶：tdyoung
There is no doubt that remote controls are extremely popular and it has become very hard to imagine a world without them. They are used to control all manner of house appliances like the TV set, the stereo, the VCR, and the satellite receiver.
上傳時間： 2013-11-13
上傳用戶：頂?shù)弥?/p>
In today’s world of modular networking and telecommunications design, it is becomingincreasingly difficult to keep alignment with the many different and often changing interfaces,both inter-board and intra-board. Each manufacturer has their own spin on the way in whichdevices are connected. To satisfy the needs of our customers, we must be able to support alltheir interface requirements. For us to be able to make products for many customers, we mustadopt a modular approach to the design. This modularity is the one issue that drives the majorproblem of shifting our bits from one modular interface to another.
標簽： 150 WP 兆兆 網(wǎng)絡(luò)
上傳時間： 2013-11-25
上傳用戶：suicone
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