The Open Radar Data Acquisition (ORDA)
Subsystem replaces the current WSR-88D Radar
Data Acquisition Subsystem with improved
receiver and signal processing hardware and with
improved user interface, signal processing and
diagnostics software. This paper will discuss the
input data from the digital receiver, the ORDA
signal processing, and the data output from the
ORDA hardware. Specifications of the ORDA
digital receiver will be presented. The paper
outlines the critical radar signal processing flow
and provides analysis of new spectrum width
computations and clutter filtering schemes used in
the ORDA system. Where appropriate, ORDA
performance enhancements, data quality
improvements and reliability and maintenance
improvements will be highlighted.
Abstract: This document explains how the Cupertino (MAXREFDES5#) Subsystem reference design meets the higher resolution, higher voltage,and isolation needs of industrial control and industrial automation applications. Hardware and firmware design files as well as FFTs andhistograms from lab measurements are provided.
Abstract: This document details the Lakewood (MAXREFDES7#) Subsystem reference design, a 3.3V input, ±12V (±15V) output, isolated power supply. The Lakewood reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and two wide input range and adjustable output low-dropout linear regulators (LDOs). Test results and hardware files are included.
Abstract: This document details the Riverside (MAXREFDES8#) Subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output low-dropout linear regulator (LDO). Test results and hardware files are included.
Abstract: This document details the Oceanside (MAXREFDES9#) Subsystem reference design, a 3.3V to 15V input,±15V (±12V) output, isolated power supply. The Oceanside design includes a high-efficiency step-up controller, a36V H-bridge transformer driver for isolated supplies, a wide input range, and adjustable output low-dropout linearregulator (LDO). Test results and hardware files are included.
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) Subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
Writing an Input Module
The sample module introduced here is called idiom (Input Device for Intercepting Output of Mice), The sample module registers itself with the USB kernel Subsystem as a mouse driver and with the input management Subsystem as a keyboard driver. idiom translates mouse movement events into keyboard input events: it reports arrow events to the input system according to how the physical mouse is moved.
