In a recent discussion with a system designer, the requirementfor his power supply was to regulate 1.5Vand deliver up to 40A of current to a load that consistedof four FPGAs. This is up to 60W of power that must bedelivered in a small area with the lowest height profi lepossible to allow a steady fl ow of air for cooling. Thepower supply had to be surface mountable and operateat high enough effi ciency to minimize heat dissipation.He also demanded the simplest possible solution so histime could be dedicated to the more complex tasks. Asidefrom precise electrical performance, this solution had toremovethe heat generated during DC to DC conversionquickly so that the circuit and the ICs in the vicinity do notoverheat. Such a solution requires an innovative designto meet these criteria:
上傳時間： 2013-11-24
上傳用戶：defghi010
As logic systems get larger and more complex, theirsupply current requirements continue to rise. Systemsrequiring 100A are fairly common. A high current powersupply to meet such requirements usually requires parallelingseveral power regulators to alleviate the thermalstress on the individual power components. A powersupply designer is left with the choice of how to drive theseparalleled regulators: brute-force single-phase or smartPolyPhaseTM.
上傳時間： 2013-10-08
上傳用戶：zhqzal1014
When a system designer specifies a nonisolated dc/dc powermodule, considering the needed input voltage range isequally as important as considering the required performanceattributes and features. Generally, nonisolated moduleshave either a narrow or a wide input voltage range. Narrowinputmodules typically have a nominal input voltage of3.3, 5, or 12 V. For systems that operate from a tightlyregulated input bus—such as those that do not use batterybackup—a narrow-input module is often adequate sincethe input remains fairly stable.Offering greater flexibility, wide-input modules operatewithin a range of 7 to 36 V, which includes the popular12- or 24-V industrial bus. This enables a single module tobe used for generating multiple voltages. These modulesare ideal for industrial controls, HVAC systems, vehicles,medical instrumentation, and other applications that usea loosely regulated distribution bus. In addition, systemspowered by a rectifier/battery charger with lead-acidbattery backup almost always require wide-input modules.System designers who choose power supplies may wantto take a close look at the latest generation of wide-inputdc/dc modules.
標簽： Wide-input modules offer dc
上傳時間： 2014-12-24
上傳用戶：dragonhaixm
The MAX9257/MAX9258 programmable serializer/deserializer (SerDes) devices transfer both video data and control signals over the same twisted-pair cable. However, control data can only be transmitted during the vertical blank time, which is indicated by the control-channel-enabled output (CCEN) signal. The electronic control unit (ECU) firmware designer needs to know how quickly to respond to the CCEN signal before it times out and how to calculate this duration. This application note describes how to calculate the duration of the CCEN for the MAX9257/MAX9258 SerDes chipset. The calculation is based on STO timeout, clock frequency, and UART bit timing. The CCEN duration is programmable and can be closed if not in use.
上傳時間： 2014-01-24
上傳用戶：xingisme
The PCA9516 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transition sees only one repeater delay.
上傳時間： 2013-11-21
上傳用戶：q123321
The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.
標簽： translating Level 9517 PCA
上傳時間： 2013-12-25
上傳用戶：wsf950131
altium designer實例教程
上傳時間： 2013-11-17
上傳用戶：zhaiye
簡單實用
上傳時間： 2013-10-11
上傳用戶：吾學吾舞
友善之臂的QtEmbedded實例教程 第一章 LINUX 圖形用戶界面 GUI 介紹.....................................................................................1 1.1 常用 GUI 介紹...................................................................................................................1 1.2 關于 Qt...............................................................................................................................2 1.3 Qt/Embedded 簡介.............................................................................................................4 1.4 Qtopia 介紹.........................................................................................................................4 第二章 QT的安裝..........................................................................................................................6 2.1 Qt X11 的安裝....................................................................................................................6 2.2 Qt/Embedded 安裝..............................................................................................................9 2.3 Qtopia 編譯.......................................................................................................................11 第三章 QT的編程........................................................................................................................12 實驗一 “Hello word！ ”Qt初探............................................................................................12 實驗二 創建一個窗口并添加按鈕.......................................................................................17 實驗三 對象間通信：Signal 和 Slot 機制........................................................................20 實驗四 菜單和快捷鍵...........................................................................................................29 實驗五 工具條和狀態欄.......................................................................................................38 實驗六 鼠標和鍵盤事件.......................................................................................................48 實驗七 對話框.......................................................................................................................63 實驗八 Qt 中的繪圖..............................................................................................................75 實驗九 Qt 中的多線程編程..................................................................................................85 實驗十 Qt 中的網絡編程......................................................................................................97 第四章 QT常用工具的介紹...................................................................................................... 111 4.1 Qt 設計器（Qt Designer）............................................................................................ 111 4.2 Tmake..............................................................................................................................113 4.3 Qvfb ................................................................................................................................114
標簽： QtEmbedded 教程
上傳時間： 2013-12-21
上傳用戶：laozhanshi111
隨著FPGA技術的發展，FPGA設計已不再只是硬件電路的設計，而是包含處理器、外圍組件和接口邏輯在內的完整數字系統，同時在處理器中編程完成嵌入式代碼的FPGA“軟”設計。與傳統的主要基于硬件描述語言進行FPGA設計開發不同，本文在電路設計軟件Altium Designer開發環境下，結合Xilinx公司的ISE設計軟件，在Altium Designer的創新電子設計平臺NanoBoard 3000上，設計實現了基于Altium Designer特有的系統級設計方法OpenBus系統的32位處理器控制LED的FPGA嵌入式設計。
上傳時間： 2013-11-09
上傳用戶：亞亞娟娟123
