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System-on-a-Chip

Adaptive Techniques for Mixed Signal System on Chip - part 3

Adaptive Techniques for Mixed Signal System on Chip - part 3

標簽： Techniques Adaptive Signal System

上傳時間： 2014-01-10

上傳用戶：dongqiangqiang
Convert Interface on a embedded System

Convert Interface on a embedded System

標簽： Interface embedded Convert System

上傳時間： 2014-01-18

上傳用戶：youlongjian0
A project by word about a fee collection system on highway

A project by word about a fee collection system on highway

標簽： collection project highway system

上傳時間： 2014-01-04

上傳用戶：asasasas
This is basic knowledge of NachOS - a virtual operating system on LINUX !! It is good for those who

This is basic knowledge of NachOS - a virtual operating system on LINUX !! It is good for those who want to know how the OS running !! Some of documents is written in English and others in VietNamese

標簽： knowledge operating virtual NachOS

上傳時間： 2017-07-15

上傳用戶：dapangxie
its bit the system on chip designed in verilog

its bit the system on chip designed in verilog

標簽： designed verilog system chip

上傳時間： 2017-08-02

上傳用戶：大融融rr
In order to thoroughly understand what makes Linux tick and why it works so well on a wide variety o

In order to thoroughly understand what makes Linux tick and why it works so well on a wide variety of systems, you need to delve deep into the heart of the kernel. The kernel handles all interactions between the CPU and the external world, and determines which programs will share processor time, in what order. It manages limited memory so well that hundreds of processes can share the system efficiently, and expertly organizes data transfers so that the CPU isn t kept waiting any longer than necessary for the relatively slow disks.

標簽： thoroughly understand variety order

上傳時間： 2014-12-07

上傳用戶：PresidentHuang
Because of the poor observability of Inertial Navigation System on stationary base, the estimation

Because of the poor observability of Inertial Navigation System on stationary base, the estimation error of the azimuth will converge very slowly in initial alignment by means of Kalmari filtering, and making the time initial alignment is longer. In this paper, a fast estimation method of the azimuth error is creatively proposed for the initial alignment of INS on stationary base. On the basis of the the fast convergence of the leveling error, the azimuth error can be directly calculated. By means of this fast initial alignment method, the time of initial alignment is reduced greatly. The computer simulation results illustrate the efficiency of the method.

標簽： observability Navigation estimation stationary

上傳時間： 2014-01-03

上傳用戶：wuyuying
In this paper, we describe the development of a rapidly reconfigurable system in which the users’ ta

In this paper, we describe the development of a rapidly reconfigurable system in which the users’ tacit knowledge and requirements are elicited via a process of Interactive Evolution, finding the image processing parameters to achieve the required goals without any need for specialised knowledge of the machine vision system. We show that the resulting segmentation can be quickly and easily evolved from scratch, and achieves detection rates comparable to those of a hand-tuned system on a hot-rolled steel defect recognition problem.

標簽： reconfigurable development the describe

上傳時間： 2014-01-05

上傳用戶：hopy
The purpose of this project is to make it possible to remotely switch on a Webasto Thermo Top C wate

The purpose of this project is to make it possible to remotely switch on a Webasto Thermo Top C water heater that is used to pre-heat the heating system of a car without starting the motor.

標簽： possible remotely purpose Webasto

上傳時間： 2013-12-28

上傳用戶：LouieWu
基于FPGA的調制解調器的研究和設計.rar

當今電子系統的設計是以大規模FPGA為物理載體的系統芯片的設計，基于FPGA的片上系統可稱為可編程片上系統(SOPC)。SOPC的設計是以知識產權核(IPCore)為基礎，以硬件描述語言為主要設計手段，借助以計算機為平臺的EDA工具進行的。本文在介紹了FPGA與SOPC相關技術的基礎上，給出了SOPC技術開發調制解調器的方案。在分析設計軟件Matlab/DSP(Digital Signal Processing)。builder以及Quartus Ⅱ開發軟件進行SOPC(System On a Programmable Chip)設計流程后，依據調制解調算法提出了一種基于DSP Builder調制解調器的SOPC實現方案，模塊化的設計方法大大縮短了調制解調器的開發周期。在SOPC技術開發調制解調器的過程中，用MATLAB/Simulink的圖形方式調用Altera DSP Builder和其他Simulink庫中的圖形模塊(Block)進行系統建模，在Simulink中仿真通過后，利用DSP Builder將Simulink的模型文件(．mdl)轉化成通用的硬件描述語言VHDL文件，從而避免了VHDL語言手動編寫系統的煩瑣過程，將精力集中于算法的優化上。基于DSP Builder的開發功能，調制解調器電路中的低通濾波器可直接調用FIRIP Core，進一步提高了開發效率。在進行編譯、仿真調試成功后，經過QuartusⅡ將編譯生成的編程文件下載到ALTERA公司Cyclone Ⅱ系列的FPGA芯片EP2C5F256C6，完成器件編程，從而給出了一種調制解調器的SOPC系統實現方案。

標簽： FPGA 調制解調器

上傳時間： 2013-06-24

上傳用戶：liuchee