<noframes id="s8gcm"></noframes> When the P89LPC90x is in programming mode all pins that are not used for programming are TRI-stated. During programming mode the reset pin has a weak pull-up resistor.
標(biāo)簽： programming TRI-stated are When
上傳時(shí)間： 2015-11-03
上傳用戶(hù)：集美慧
以TRI公司的基于NOR Flash 管理軟件FMM為例，詳細(xì)介紹嵌入式系統(tǒng)中如何根據(jù)Flash的物理特性來(lái)進(jìn)行Flash存儲(chǔ)管理
上傳時(shí)間： 2014-01-24
上傳用戶(hù)：sqq
以TRI公司的基于NORFlash的Flash管理軟件FMM 為例，詳細(xì)介紹嵌入式系統(tǒng)中如何根據(jù) Flash 的物理特性來(lái)進(jìn)行Flash存儲(chǔ)管理
標(biāo)簽： NORFlash Flash TRI FMM
上傳時(shí)間： 2014-01-10
上傳用戶(hù)：wfl_yy
Binary search Ham binsearch la mot ham de qui, giup tim gia TRI tren mang so a[].Neu ham tra ve TRI -1 la khong tim thay,neu ham tra ve TRI khac -1 la tim thay tai vi TRI la gia TRI tra ve
標(biāo)簽： binsearch ham TRI Binary
上傳時(shí)間： 2017-05-15
上傳用戶(hù)：BIBI
GPIO (General Purpose Input and Output ports) with microprocessor programmable TRI-state bus interface
標(biāo)簽： microprocessor programmable TRI-state General
上傳時(shí)間： 2017-06-13
上傳用戶(hù)：hxy200501
The TRI-Mode Ethernet MAC (TEMAC) UltraController-II module is a minimal footprint,embedded network processing engine based on the PowerPC™ 405 (PPC405) processor coreand the TEMAC core embedded within a Virtex™-4 FX Platform FPGA. The TEMACUltraController-II module connects to an external PHY through Gigabit Media IndependentInterface (GMII) and Management Data Input/Output (MDIO) interfaces and supports TRI-mode(10/100/1000 Mb/s) Ethernet. Software running from the processor cache reads and writesthrough an On-Chip Memory (OCM) interface to two FIFOs that act as buffers between thedifferent clock domains of the PPC405 OCM and the TEMAC.
上傳時(shí)間： 2013-10-26
上傳用戶(hù)：yuzsu
This application note provides step-by-step instructions on how to recreate a TRI-Mode Ethernet(TEMAC) performance testing system using the ML405 board and MontaVista Linux 4.0. Thisapplication note shows how to set up a simple EDK Base System Builder system on the ML405Evaluation Platform and run performance tests. The network architecture for the test isdescribed. A system is built and downloaded into the FPGA. A MontaVista Linux kernel isconfigured, built, and downloaded into the ML405 Evaluation Platform. The instructions forobtaining and setting up the software used to perform the measurements, netperf, are given.
標(biāo)簽： Virtex TEMAC XAPP 1023
上傳時(shí)間： 2013-11-11
上傳用戶(hù)：saharawalker
2． Using Gaussian elimination method and Gaussian elimination method with row scaled method to solve the following TRI-diagonal system for n=10 and 100
標(biāo)簽： method elimination Gaussian scaled
上傳時(shí)間： 2013-12-31
上傳用戶(hù)：lyy1234
SOPC實(shí)驗(yàn)--Hello World實(shí)驗(yàn):啟動(dòng)Quartus II軟件，選擇File→New Project Wizard，在出現(xiàn)的對(duì)話框中填寫(xiě)項(xiàng)目名稱(chēng) 2、 點(diǎn)擊Finish，然后選擇“是”。選擇Assignments→Device，改寫(xiě)各項(xiàng)內(nèi)容。Family改為CycloneII，根據(jù)實(shí)驗(yàn)板上的器件選擇相應(yīng)的器件，本實(shí)驗(yàn)選擇EP2C5T144C8,點(diǎn)擊對(duì)話框中的Device & Pin Options，在Configuration中，選項(xiàng)Use Configuration Device為EPCS1，選項(xiàng)Unused Pins為As inputs,TRI-stated.
標(biāo)簽： Quartus Hello World SOPC
上傳時(shí)間： 2014-01-13
上傳用戶(hù)：梧桐
The SP486 and SP487 are low–power quad differential line drivers meeting RS-485 and RS-422 standards. The SP486 features a common driver enable control the SP487 provides independent driver enable controls for each pair of drivers. Both feature TRI–state outputs and wide common–mode input range. Both are available in 16–pin plastic DIP and SOIC packages.
標(biāo)簽： differential and standard drivers
上傳時(shí)間： 2014-01-13
上傳用戶(hù)：tianyi223
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