1.Polarization analysis and filtering for three-component data 2.SUEIPOFI - EIgenimage (SVD) based POlarization FIlter for three-component data
標簽： three-component Polarization EIgenimage filtering
上傳時間： 2014-01-19
上傳用戶：xauthu
psk to DPSK conversion (absolute phase shift keying to the relative phase shift keying conversion)
標簽： conversion keying phase shift
上傳時間： 2017-01-28
上傳用戶：kbnswdifs
This paper studies the problem of tracking a ballistic object in the reentry phase by processing radar measurements. A suitable (highly nonlinear) model of target motion is developed and the theoretical Cramer—Rao lower bounds (CRLB) of estimation error are derived. The estimation performance (error mean and
標簽： processing ballistic the tracking
上傳時間： 2014-10-31
上傳用戶：yyyyyyyyyy
This paper studies the problem of tracking a ballistic object in the reentry phase by processing radar measurements. A suitable (highly nonlinear) model of target motion is developed and the theoretical Cramer—Rao lower bounds (CRLB) of estimation error are derived. The estimation performance (error mean and
標簽： processing ballistic the tracking
上傳時間： 2014-01-14
上傳用戶：奇奇奔奔
This paper studies the problem of tracking a ballistic object in the reentry phase by processing radar measurements. A suitable (highly nonlinear) model of target motion is developed and the theoretical Cramer—Rao lower bounds (CRLB) of estimation error are derived. The estimation performance (error mean and
標簽： processing ballistic the tracking
上傳時間： 2013-12-22
上傳用戶：asddsd
FINITE ELEMENT ANALYSIS FOR PLANE PLOBLEM (THREE-NODE TRIANGULAR ELEMENT)平面三角形有限元fortran源程序
標簽： ELEMENT THREE-NODE TRIANGULAR ANALYSIS
上傳時間： 2017-02-01
上傳用戶：R50974
FDTD three-dimensional CPML
標簽： three-dimensional FDTD CPML
上傳時間： 2014-11-17
上傳用戶：ANRAN
Current Transformer Phase Shieft compensation and calibration
標簽： compensation Transformer calibration Current
上傳時間： 2017-02-06
上傳用戶：xiaohuanhuan
MSP430 A Low-Cost Single-Phase Electricity Meter Using MSP430C11x
標簽： Single-Phase Electricity MSP 430
上傳時間： 2014-01-25
上傳用戶：洛木卓
This document describes how to switch to and program the unisersal serial bus (USB) analog phase-locked loop (APLL) on the C5506/C5507/C5509A devices. Example assembly programs for programming and switching to and from the APLL are also provided in the attached zip file. It is assumed that the reader is familiar with the use and operation of the C5506/C5507/C5509A USB digital phase-locked loop (DPLL) and C55x™ Digital Signal Processor (DSP) IDLE procedures.
標簽： describes unisersal document phase-lo
上傳時間： 2014-01-13
上傳用戶：hustfanenze
