We present a particle filter construction for a system that exhibits Time-scale separation. The separation of Time-scales allows two simplifications that we exploit: i) The use of the averaging principle for the dimensional reduction of the system needed to solve for each particle and ii) the factorization of the transition probability which allows the Rao-Blackwellization of the filtering step. Both simplifications can be implemented using the coarse projective integration framework. The resulting particle filter is faster and has smaller variance than the particle filter based on the original system. The convergence of the new particle filter to the analytical filter for the original system is proved and some numerical results are provided.
標(biāo)簽： construction separation Time-scale particle
上傳時(shí)間： 2016-01-02
上傳用戶：fhzm5658
Software Engineering is a discipline applied by teams to produce high-quality, large-scale, cost-effective software that satisfies the users’ needs, and can be maintained over time Software Development is a weaker term where standards, tools, processes, etc. may not be applied
標(biāo)簽： high-quality Engineering large-scale discipline
上傳時(shí)間： 2014-01-09
上傳用戶：bcjtao
從時(shí)域分析比較了ofdm和stbc與ofdm結(jié)合的性能差別-from time-domain analysis and comparison of OFDM stbc OFDM combined wi
上傳時(shí)間： 2013-06-05
上傳用戶：caozhizhi
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
標(biāo)簽： Converter Defi ADC 轉(zhuǎn)換器
上傳時(shí)間： 2013-11-12
上傳用戶：pans0ul
HT47R20A-1時(shí)基(Time Base)使用介紹 HT47 系列單片機(jī)的時(shí)基可提供一個(gè)周期性超時(shí)時(shí)間周期以產(chǎn)生規(guī)則性的內(nèi)部中斷。時(shí)基的時(shí)鐘來源可由掩膜選擇設(shè)定為WDT 時(shí)鐘、RTC 時(shí)鐘或指令時(shí)鐘（系統(tǒng)時(shí)鐘/4）；其超時(shí)時(shí)間范圍可由掩膜選擇設(shè)定為“時(shí)鐘來源”/212~“時(shí)鐘來源”/215。如果時(shí)基發(fā)生超時(shí)現(xiàn)象，則其對應(yīng)的中斷請求標(biāo)志（TBF）會(huì)被置位，如果中斷允許，則產(chǎn)生一個(gè)中斷服務(wù)到08H 的地址。
上傳時(shí)間： 2013-11-15
上傳用戶：13925096126
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時(shí)間： 2013-10-22
上傳用戶：ztj182002
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時(shí)間： 2013-11-21
上傳用戶：不懂夜的黑
Backpropagation Network Time-Series Forecasting 源碼, 經(jīng)典的BPN人工神經(jīng)網(wǎng)絡(luò)例子源碼
標(biāo)簽： Backpropagation Forecasting Time-Series Network
上傳時(shí)間： 2015-01-05
上傳用戶：tb_6877751
Unix和NT上NetWork Time網(wǎng)絡(luò)協(xié)議（4.0版本）
標(biāo)簽： NetWork Unix Time 4.0
上傳時(shí)間： 2014-01-01
上傳用戶：鳳臨西北
rtai-3.1-test3的源代碼(Real-Time Application Interface )
標(biāo)簽： Application Real-Time Interface rtai
上傳時(shí)間： 2014-11-22
上傳用戶：lps11188
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