This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phasefrequency
detector (PFD) and digital-to-analog converter (DAC) circuit element to obtain >28dB high frequency noise reduction when compared to classicalfrequency synthesis.
標簽：
fractional-N
transmitter
bandwidth
circuits
上傳時間：
2016-04-14
上傳用戶：er1219
