The future satellite communication systems are re- quired to support the higher transmission data rate for providing the multimedia services by employing the e鏗僣ient modulation method such as multi-level QAM.
標簽： communication transmission satellite systems
上傳時間： 2017-04-18
上傳用戶：busterman
A Convex Hull is the smallest convex polygon that contains every point of the set S. A polygon P is convex if and only if, for any two points A and B inside the polygon, the line segment AB is inside P. One way to visualize a convex hull is to put a "rubber band" around all the points, and let it wrap as tight as it can. The resultant polygon is a convex hull.
上傳時間： 2013-12-23
上傳用戶：it男一枚
ecos RTOS 原理介紹和應用開發The design philosophy of eCos was to augment an open-source RTOS (which meant no per-unit royalties) with source-level con?guration tools that would enable embedded developers to scale their RTOS from hundreds of bytes to hundreds of kilobytes without needing to manu- ally change a line of source code.
標簽： RTOS open-source philosophy augment
上傳時間： 2013-12-16
上傳用戶：天涯
* Use 10 MHz crystal frequency. * Use Timer0 for ten millisecond looptime. * Blink "Alive" LED every two and a half seconds. * Use pushbutton to exercise Screens utility.
標簽： millisecond Use frequency looptime
上傳時間： 2017-04-23
上傳用戶：偷心的海盜
PIC_Hi-Tech_C_Mike_Pearces_I2C_routines * Use 10 MHz crystal frequency. * Use Timer0 for ten millisecond looptime. * Blink "Alive" LED every two and a half seconds. * Use pushbutton to exercise Screens utility.
標簽： PIC_Hi-Tech_C_Mike_Pearces_I C_routines Use frequency
上傳時間： 2013-12-19
上傳用戶：標點符號
The use of hardware description languages (HDLs) is becoming increasingly common for designing and verifying FPGA designs. Behavior level description not only increases design productivity, but also provides unique advantages for design verification. The most dominant HDLs today are Verilog and VHDL. This application note illustrates the use of Verilog in the design and verification of a digital UART (Universal Asynchronous Receiver & Transmitter).
標簽： increasingly description designing languages
上傳時間： 2014-01-08
上傳用戶：小草123
Please read your package and describe it at least 40 bytes. System will automatically delete the directory of debug and release, so please do not put files on these two directory.
標簽： automatically describe package Please
上傳時間： 2013-12-28
上傳用戶：330402686
Please read your package and describe it at least 40 bytes. System will automatically delete the directory of debug and release, so please do not put files on these two directory.
標簽： automatically describe package Please
上傳時間： 2017-04-25
上傳用戶：731140412
Please read your package and describe it at least 40 bytes. System will automatically delete the directory of debug and release, so please do not put files on these two directory.
標簽： automatically describe package Please
上傳時間： 2013-12-15
上傳用戶：小寶愛考拉
Please read your package and describe it at least 40 bytes. System will automatically delete the directory of debug and release, so please do not put files on these two directory.
標簽： automatically describe package Please
上傳時間： 2013-12-24
上傳用戶：cursor
