USB接口控制器參考設計,xilinx提供VHDL代碼 usb xilinx vhdl
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標簽：
xilinx
VHDL
USB
us
上傳時間：
2013-10-29
上傳用戶：zhouchang199
//打開 USB 口讀寫, 由驅(qū)動程序的 Pipe 名確定
HANDLE hPipe = OpenMyDevPipe("MyPipe1") //驅(qū)動程序里面的 Pipe 名, 對應訪問某個端點的 I/O, 這里我亂寫的, 需要與驅(qū)動一致
if(hPipe != INVALID_HANDLE_VALUE) //打開 Pipe 成功
{
ReadFile(hPipe, Buffer, BufSize, &nBytesRead, NULL) //從 hPipe 里讀取數(shù)據(jù)到 Buffer 里
//WriteFile(hPipe, Buffer, BytesToWrite, &nBytesWritten, NULL) //把 Buffer 里面的 BytesToWrite 字節(jié)寫入 hPipe
CloseHandle(hPipe)
}
//使用 DeviceIoControl 訪問 USB 設備
HANDLE hDevice = OpenMyDevice()
if(hDevice != INVALID_HANDLE_VALUE) //打開設備成功
{
//這些 DeviceIoControl 功能都是由設備定義的, 具體看設備和驅(qū)動的資料
if(DeviceIoControl(hDevice, IOCTL_READ_xxxx, &IOBlock, sizeof(IOBLOCK), &c, 1, &nBytes, NULL))
{
//成功
}
CloseHandle(hDevice)
}
標簽：
Pipe
OpenMyDevPipe
MyPipe1
HANDLE
上傳時間：
2014-11-25
上傳用戶：stampede
