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VLSI

VLSI UART referene, use UART0_3

VLSI UART referene, use UART0_3

標簽： UART referene VLSI use

上傳時間： 2013-12-19

上傳用戶：xinzhch
VLSI custom microelectronics digital analog and mixed signal

VLSI custom microelectronics digital analog and mixed signal

標簽： microelectronics digital custom analog

上傳時間： 2017-04-22

上傳用戶：cmc_68289287
VLSI sensor design and application

VLSI sensor design and application

標簽： application sensor design VLSI

上傳時間： 2013-12-25

上傳用戶：hongmo
introductio to VLSI fabrication

introductio to VLSI fabrication

標簽： introductio fabrication VLSI to

上傳時間： 2017-05-04

上傳用戶：JasonC
This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting codi

This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.

標簽： errorcorrecting architecture efficient devoted

上傳時間： 2017-05-08

上傳用戶：康郎
Description of a high performance FFT architecture useful for VLSI implementation.

Description of a high performance FFT architecture useful for VLSI implementation.

標簽： implementation architecture Description performance

上傳時間： 2017-05-09

上傳用戶：luke5347
VLSI KL partitioning Algorithm based programme for 100 nodes. It s dynamic progremme so by changing

VLSI KL partitioning Algorithm based programme for 100 nodes. It s dynamic progremme so by changing the MAX value we can change the number of nodes in the network.

標簽： partitioning Algorithm programme progremme

上傳時間： 2013-12-05

上傳用戶：wweqas
OFDM系統均衡器設計優化及VLSI實現的研究文章

OFDM系統均衡器設計優化及VLSI實現的研究文章

標簽： OFDM VLSI 均衡器

上傳時間： 2014-08-14

上傳用戶：zhengjian
VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP applica

VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application

標簽： high implementation resolution algorithm

上傳時間： 2013-12-26

上傳用戶：yuchunhai1990
高速高性能FFT處理器的VLSI實現研究

高速高性能FFT處理器的VLSI實現研究，適合做FPGA的技術人員參考研究FFT

標簽： VLSI FFT 性能處理器

上傳時間： 2017-06-20

上傳用戶：aa17807091

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VLSI

VLSI UART referene, use UART0_3

VLSI custom microelectronics digital analog and mixed signal

VLSI sensor design and application

introductio to VLSI fabrication

This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting codi

Description of a high performance FFT architecture useful for VLSI implementation.

VLSI KL partitioning Algorithm based programme for 100 nodes. It s dynamic progremme so by changing

OFDM系統均衡器設計優化及VLSI實現的研究文章

VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP applica

高速高性能FFT處理器的VLSI實現研究