HSDPA（High Speed Downlink Packet Access）技術(shù)是WCDMA基于R5的增強型技術(shù)，通過各種 核心技術(shù)可使下行速率達到14.4M，是WCDMA移動運營商進行大流量移動多媒體服務的首選技術(shù)。 下面簡單介紹中興通訊的HSPDA解決方案... ...
標簽： Downlink Access Packet HSDPA
上傳時間： 2015-05-13
上傳用戶：頂?shù)弥?/p>
％直接型到并聯(lián)型的轉(zhuǎn)換 ％ ％[C,B,A]=dir2par(b,a) ％C為當b的長度大于a時的多項式部分 ％B為包含各bk的K乘2維實系數(shù)矩陣 ％A為包含各ak的K乘3維實系數(shù)矩陣 ％b為直接型分子多項式系數(shù) ％a為直接型分母多項式系數(shù) ％
上傳時間： 2014-01-20
上傳用戶：lizhen9880
直接型到級聯(lián)型的形式轉(zhuǎn)換 ％ [b0,B,A]=dir2cas(b,a) ％b 為直接型的分子多項式系數(shù) ％a 為直接型的分母多項式系數(shù) ％b0為增益系數(shù) ％B 為包含各bk的K乘3維實系數(shù)矩陣 ％A 為包含各ak的K乘3維實系數(shù)矩陣 ％
上傳時間： 2013-12-30
上傳用戶：agent
Interfacing AD7276 High-Speed Data Converters to ADSP-BF535 Blackfin Processors
標簽： Interfacing High-Speed Converters Processors
上傳時間： 2013-12-20
上傳用戶：希醬大魔王
This document provides guidelines for integrating a discrete high speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標簽： integrating controller guidelines document
上傳時間： 2013-11-27
上傳用戶：電子世界
This document provides guidelines for integrating a discrete high speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標簽： integrating controller guidelines document
上傳時間： 2015-11-18
上傳用戶：xhz1993
The ability to write efficient, high-speed arithmetic routines ultimately depends upon your knowledge of the elements of arithmetic as they exist on a computer. That conclusion and this book are the result of a long and frustrating search for information on writing arithmetic routines for real-time embedded systems. With instruction cycle times coming down and clock rates going up, it would seem that speed is not a problem in writing fast routines. In addition, math coprocessors are becoming more popular and less expensive than ever before and are readily available. These factors make arithmetic easier and faster to use and implement. However, for many of you the systems that you are working on do not include the latest chips or the faster processors. Some of the most widely used microcontrollers used today are not Digital Signal Processors (DSP), but simple eight-bit controllers such as the Intel 8051 or 8048 microprocessors.
標簽： arithmetic high-speed ultimately efficient
上傳時間： 2014-11-30
上傳用戶：lizhen9880
High-Speed PCI Express Passive Switches
標簽： High-Speed Switches Express Passive
上傳時間： 2016-02-04
上傳用戶：sclyutian
B樹及其B+樹的實現(xiàn)代碼，支持模版（數(shù)據(jù)類型，M值）
上傳時間： 2016-02-22
上傳用戶：jhksyghr
Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications-High speed Physical Layer in the 5 GHZ Band
標簽： specifications-High Wireless Physical Control
上傳時間： 2013-12-18
上傳用戶：jkhjkh1982
