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  • TdcHintEx Provides your users with a cool transparent hint. It replaces standard Delphi hint wind

    TdcHintEx Provides your users with a cool transparent hint. It replaces standard Delphi hint window. Just drop a TdcHintEx in your main form. Set Enabled to True. And run your application. Oh btw, please set ShowHint to True.. :) Drop me a line, and tell me what you think of it. Antony Hoon antony7777@telkom.net

    標簽: hint transparent TdcHintEx Provides

    上傳時間: 2014-01-12

    上傳用戶:181992417

  • How to use GetMyIP, whre you can finde all of the convienience on getting your favourite IP of your

    How to use GetMyIP, whre you can finde all of the convienience on getting your favourite IP of your ISP you use to connect to internet.

    標簽: your convienience favourite GetMyIP

    上傳時間: 2014-02-26

    上傳用戶:asdkin

  • cledlabel component let you add 7 segment edit box to your application. I added floatingpointformat

    cledlabel component let you add 7 segment edit box to your application. I added floatingpointformat function that let you add float data to the screen

    標簽: floatingpointformat application cledlabel component

    上傳時間: 2017-09-17

    上傳用戶:許小華

  • Please read your package and describe it at least 40 bytes in English.

    Please read your package and describe it at least 40 bytes in English.

    標簽: describe English package Please

    上傳時間: 2013-12-06

    上傳用戶:waizhang

  • This circuit is a nice edge detector that gives you synchronous notification of edges on your input

    This circuit is a nice edge detector that gives you synchronous notification of edges on your input signal. There s no excuse for not doing this it s a tiny circuit in just five lines of Verilog.

    標簽: notification synchronous detector circuit

    上傳時間: 2017-09-18

    上傳用戶:xieguodong1234

  • Please read your package and describe it at least 40 bytes in English. System will automatically de

    Please read your package and describe it at least 40 bytes in English. System will automatically delete the directory of debug and release, so please do not put files on these two directory.

    標簽: automatically describe English package

    上傳時間: 2017-09-20

    上傳用戶:alan-ee

  • Compress your arquives..winth C language

    Compress your arquives..winth C language

    標簽: Compress arquives language winth

    上傳時間: 2017-09-28

    上傳用戶:yan2267246

  • Programming Your Hom

    Welcome to the exciting, empowering world of home automation! If you have ever wanted your home to do more than just protect you against the outside elements and want to interface it to the digital domain, this book will show you how. By demonstrating several easy-to-build projects, you will be able to take the skills you learned from this book and expand upon and apply them toward custom home automation projects of your own design.

    標簽: Programming Your Hom

    上傳時間: 2020-06-06

    上傳用戶:shancjb

  • 雷達信號處理系統(tǒng)的設計與FPGA實現(xiàn).rar

    雷達信號處理是雷達系統(tǒng)的重要組成部分。在數(shù)字信號處理技術飛速發(fā)展的今天,雷達信號處理中也普遍使用數(shù)字信號處理技術。而現(xiàn)場可編程門陣列(FPGA)在數(shù)字信號處理中的廣泛應用,使得FPGA在雷達信號處理中也占據(jù)了重要地位。 針對雷達信號處理的設計與實現(xiàn),本文在以下兩個方面展開研究: 一方面以線性調頻信號(LFM)為例,分別對幾種基本的雷達信號處理,如正交相干檢波、脈沖壓縮、動目標顯示(MTI)/動目標檢測(MTD)和恒虛警(CFAR)詳細地闡述了其原理,在此基礎上給出了其經(jīng)常采用的實現(xiàn)方法,并在MATLAB環(huán)境中對各個環(huán)節(jié)進行了參數(shù)化仿真,詳盡地給出了各環(huán)節(jié)的仿真波形圖。針對仿真結果,直觀形象地說明了不同實現(xiàn)方法的優(yōu)劣。 另一方面結合MATLAB仿真結果,給出利用FPGA實現(xiàn)雷達信號處理的方案。在Xilinx ISE6.3i軟件集成環(huán)境下,通過對Xilinx提供的IP核的調用,并與VHDL語言相結合,完成雷達信號處理的FPGA實現(xiàn)。

    標簽: FPGA 雷達信號 處理系統(tǒng)

    上傳時間: 2013-06-08

    上傳用戶:qweqweqwe

  • 基于FPGA的雷達信號處理系統(tǒng)設計.rar

    雷達信號處理是雷達系統(tǒng)的重要組成部分。在數(shù)字信號處理技術飛速發(fā)展的今天,雷達信號處理中也普遍使用數(shù)字信號處理技術。而現(xiàn)場可編程門陣列(FPGA)在數(shù)字信號處理中的廣泛應用,使得FPGA在雷達信號處理中也占據(jù)了重要地位。 針對脈壓雷達信號處理的FPGA實現(xiàn),本文在以下幾個方面展開研究: 首先對幾種主要的脈沖壓縮信號進行了詳細的分析,得出了各種信號的特點及其處理方式;并比較了各種方式的優(yōu)缺點。 其次對幾種基本的雷達信號處理如脈沖壓縮、動目標檢測(MTD)、恒虛警(CFAR)等詳細地闡述了其原理;列舉了各種信號處理經(jīng)常采用的實現(xiàn)方法,對各種方法進行了比較研究;并針對線性調頻信號在MATLAB環(huán)境中對雷達回波信號處理進行仿真。 接下來,在Xilinx ISE6.3i軟件集成環(huán)境下,通過對Xilinx提供的免費IP核的調用,并與VHDL語言相結合,進行雷達信號處理的FPGA實現(xiàn)。

    標簽: FPGA 雷達信號處理 系統(tǒng)設計

    上傳時間: 2013-06-24

    上傳用戶:lingzhichao

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