針對(duì)標(biāo)準(zhǔn)ahb總線對(duì)具有特定訪問時(shí)序的設(shè)備數(shù)據(jù)傳輸效率較低的情況，提出一種新的實(shí)現(xiàn)方案。利用ahb總線突發(fā)傳輸時(shí)的組合信息，根據(jù)某種算法生成地址和控制信號(hào)，以提高慢速設(shè)備的總線訪問效率。
標(biāo)簽： ahb 總線接口 實(shí)現(xiàn)方案
上傳時(shí)間： 2013-10-09
上傳用戶：lvzhr
ahb sdram interface.arm cpu series,include controller
標(biāo)簽： controller interface include series
上傳時(shí)間： 2015-11-22
上傳用戶：wab1981
An ahb system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered ahb systems and arbitrated ahb ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.
標(biāo)簽： interconnections approach general include
上傳時(shí)間： 2015-12-12
上傳用戶：lyy1234
ahb to PCI Structure for FPGA/Asic Designer
標(biāo)簽： Structure Designer FPGA Asic
上傳時(shí)間： 2013-12-26
上傳用戶：壞壞的華仔
ahb slave 的一個(gè)簡(jiǎn)單的原型程序，通過參考該程序，可以寫出相應(yīng)的ahb slave 代碼
上傳時(shí)間： 2014-12-02
上傳用戶：15071087253
appnote65_quickmips_ahb_interface_design_example ahb接口設(shè)計(jì)
標(biāo)簽： quickmips_ahb_interface_design_ex appnote ample ahb
上傳時(shí)間： 2013-12-21
上傳用戶：Ants
AMBA總線ahb TO ahb bridge
上傳時(shí)間： 2014-01-20
上傳用戶：小儒尼尼奧
amba ahb protocol with test benches
標(biāo)簽： protocol benches amba with
上傳時(shí)間： 2014-01-06
上傳用戶：R50974
ahb BUS, Master Slave Arbiter -- example
標(biāo)簽： Arbiter example Master Slave
上傳時(shí)間： 2014-01-15
上傳用戶：change0329
opencore ahb to wishbone bus verilog code
標(biāo)簽： opencore wishbone verilog code
上傳時(shí)間： 2013-12-07
上傳用戶：努力努力再努力
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