Code was successfully implemented within ALtera FPGA with Quartus 6.0. It presents two polish own female names: ULA and ALA whose are scrolling on the 4-columns crystal LED. When you press the switch it will turn from ULA into ALA and continue scrolling.
使用FPGA/CPLD設置語音AD、DA轉換芯片AIC23，FPGA/CPLD系統時鐘為24.576MHz
1、AIC系統時鐘為12.288MHz，SPI時鐘為6.144MHz
2、AIC處于主控模式
3、input bit length 16bit output bit length 16bit MSB first
4、幀同步在96KHz
