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and-mp

  • PCA9555 16bit I2C-bus and SMBu

    The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.

    標(biāo)簽: C-bus 9555 SMBu PCA

    上傳時間: 2013-11-13

    上傳用戶:fredguo

  • 8-bit I2C-bus and SMBus IO port with reset

    The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.

    標(biāo)簽: C-bus SMBus reset port

    上傳時間: 2014-01-18

    上傳用戶:bs2005

  • 16-bit IC and SMBus I/O Port w

    The CAT9555 is a CMOS device that provides 16-bitparallel input/output port expansion for I²C and SMBuscompatible applications. These I/O expanders providea simple solution in applications where additional I/Osare needed: sensors, power switches, LEDs,pushbuttons, and fans.

    標(biāo)簽: SMBus Port bit and

    上傳時間: 2014-01-09

    上傳用戶:1101055045

  • 8-bit IC and SMBus IO Port wit

    The CAT9534 is an 8-bit parallel input/output portexpander for I²C and SMBus compatible applications.These I/O expanders provide a simple solution inapplications where additional I/Os are needed: sensors,power switches, LEDs, pushbuttons, and fans.The CAT9534 consists of an input port register, anoutput port register, a configuration register, a polarityinversion register and an I²C/SMBus-compatible serialinterface.

    標(biāo)簽: SMBus Port bit and

    上傳時間: 2013-11-09

    上傳用戶:liulinshan2010

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    標(biāo)簽: Signal Input Fall Rise

    上傳時間: 2013-10-23

    上傳用戶:copu

  • Reading and Writing iButtons v

    Abstract: This application note explains the hardware of different types of 1-Wire® interfaces and software examples adapted to this hardware with a focus on serial ports. Depending on the types of iButtons required for a project and the type of computer to be used, the most economical interface is easily found. The hardware examples shown are basically two different types: 5V general interface and 12V RS-232 interface. Within the 5V group a common printed circuit board could be used for all circuits described. The variations can be achieved by different populations of components. The same principal is used for the 12V RS-232 interface. The population determines if it is a Read all or a Read/Write all type of interface. There are other possible circuit implementations to create a 1-Wire interface. The circuits described in this application note cover many different configurations. For a custom application, one of the described options can be adapted to meet individual needs.

    標(biāo)簽: iButtons Reading Writing and

    上傳時間: 2013-10-29

    上傳用戶:long14578

  • 基于多點網(wǎng)絡(luò)的水廠自動監(jiān)控系統(tǒng)設(shè)計

    基于多點網(wǎng)絡(luò)的水廠自動監(jiān)控系統(tǒng)設(shè)計Design of MPI Based Automatic Monitoring and Control System in Water Works劉 美 俊(湖南工程學(xué)院,湘潭411101)摘要針對水廠工作水泵多、現(xiàn)場離控制站距離遠(yuǎn)的特點,提出了一種基于MPI多點網(wǎng)絡(luò)的自動監(jiān)控系統(tǒng)的設(shè)計方法,分析了系統(tǒng)的工作原理,介紹了系統(tǒng)中數(shù)據(jù)的采集與處理、主站與從站的通信原理以及系統(tǒng)軟件的設(shè)計。由于這種系統(tǒng)的主、從站PLC之間采用MPI網(wǎng)絡(luò)通信,具有運行可靠、性能價格比高的特點,所以適用于中小規(guī)模水廠的分布式監(jiān)控場合。關(guān)鍵詞多點網(wǎng)絡(luò)主站從站監(jiān)控系統(tǒng)Abstract Ina ccordancew ithth efe atuersof w aterw orks,i. e. ,manyp umpsin o perationa ndth ep umps, farfor mt hec ontrolst ation,th em ethodo fdesigninga na utomati(〕monitoringa ndc ontorlsy stemb asedo nM PIis p resented.Th eo perationalpr incipleo fth esy stemi san alyzed,th ed atac olection,data processing; communication between master station and slave station as wel as design and system software are discussed. Because MPI network communicationis used among master station, slave stations and PLC, the system is reliable and high cost-efective. It is, suitable for smal and mediumsized water works for distrbuted monitoring and control.Keywords MPI Masterst ation Slaves tation Monitoringa ndc ontorlsy stem 自來 水 廠 的自動控制系統(tǒng)一般分為兩大部分,一對組態(tài)硬件要求較高,投資較大。相對而言,MPI網(wǎng)是水源地深水泵的工作控制,一是水廠區(qū)變頻恒壓供絡(luò)速度可達(dá)187.5 M bps,通過一級中繼器傳輸距離可水控制,兩部分的實際距離通常都比較遠(yuǎn)。某廠水源達(dá)Ikm 。根據(jù)水廠的具體情況,確定以MPI方式組地有3臺深井泵給水廠區(qū)的蓄水池供水。水廠區(qū)的成網(wǎng)絡(luò),主站PLC為S7-300系列的CPU3121FM,從任務(wù)是對水池的水進(jìn)行消毒處理后,通過加壓泵向管站為S7-200系列的CPU222。這樣既滿足了系統(tǒng)要路恒壓供水。選用Siemens公司的S7系列可編程控求,又相對于Profibus網(wǎng)絡(luò)節(jié)省了三分之一的成本,制器(PLC)和上位機組成實時數(shù)據(jù)采集和監(jiān)控系統(tǒng), 這種分布式監(jiān)控系統(tǒng)具有較高的性能價格比。系統(tǒng)對深水泵進(jìn)行遠(yuǎn)程控制,對供水泵采用變頻器進(jìn)行恒中PLC的物理層采用RS - 485接口,網(wǎng)絡(luò)延伸選用壓控制以保證整個水廠的電機設(shè)備安全、可靠地運帶防雷保護(hù)的中繼器,使系統(tǒng)的安全運行得到了保行。證。MPI網(wǎng)絡(luò)的拓?fù)浣Y(jié)構(gòu)如圖1所示。1 多點網(wǎng)絡(luò)(NWI)監(jiān)控系統(tǒng)的組成Sie me ns 公司S7系列PLC通常有MP」多點網(wǎng)絡(luò)與Profibus現(xiàn)場總線網(wǎng)絡(luò)兩種組網(wǎng)方式。Profibus現(xiàn)場總線的應(yīng)用目前較為普遍,通用性較好,它由Profibus一DP, Profibus一FMS, Profibus一PA組成。Profibus - DP型用于分散外設(shè)間的數(shù)據(jù)傳輸,傳輸速率為9.6kbps一12Mbps,主要用于現(xiàn)場控制器與分散1/0之間的通信,可滿足交直流調(diào)速系統(tǒng)快速響應(yīng)的時間要求,特別適合于加工自動化領(lǐng)域的應(yīng)用;Profibus - FMS主要解決車間級通信問題,完成中等傳輸速度的循環(huán)或非循環(huán)數(shù)據(jù)交換任務(wù),適用于紡織、樓宇自動化、可編程控制器、低壓開關(guān)等;Profibus - PA型采用了OSI模型的物理層和數(shù)據(jù)鏈路層,適用于過程自動化的總線類型。

    標(biāo)簽: 多點 網(wǎng)絡(luò) 系統(tǒng)設(shè)計 自動監(jiān)控

    上傳時間: 2013-10-09

    上傳用戶:fac1003

  • pwm research and implementatio

    pwm research and implementation on mcs-51

    標(biāo)簽: implementatio research pwm and

    上傳時間: 2013-11-23

    上傳用戶:a155166

  • The Linux Programming Interface - A Linux and UNIX System Programming Handbook

    The Linux Programming Interface - A Linux and UNIX System

    標(biāo)簽: Programming Linux Interface Handbook

    上傳時間: 2013-11-10

    上傳用戶:asdstation

  • Rf And Microwave Power Amplifier Design(2005)

    The main objective of this book is to present all the relevant informationrequired for RF and micro-wave power amplifier design includingwell-known and novel theoretical approaches and practical design techniquesas well as to suggest optimum design approaches effectively combininganalytical calculations and computer-aided design. This bookcan also be very useful for lecturing to promote the analytical way ofthinking with practical verification by making a bridge between theoryand practice of RF and microwave engineering. As it often happens, anew result is the well-forgotten old one. Therefore, the demonstrationof not only new results based on new technologies or circuit schematicsis given, but some sufficiently old ideas or approaches are also introduced,that could be very useful in modern practice or could contributeto appearance of new ideas or schematic techniques.

    標(biāo)簽: Amplifier Microwave Design Power

    上傳時間: 2013-12-22

    上傳用戶:vodssv

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