·上傳一些無刷電機BLDC的資料，還有幾篇直接轉矩DTC的控制文章，希望對大家能有幫助。 (原文件名: A New Simulation Model of BLDC Motor With Real Back EMF Waveform.pdf) (原文件名: A Sensorless Approach to Control of a Turbodynamic.PDF)
上傳時間： 2013-06-09
上傳用戶：czl10052678
在集群系統中，負載均衡算法是影響系統性能的關鍵因素之一。為了進一步提高集群系統的性能，有必要對負載均衡算法進行優化。通過對最小連接算法和DFB（Dynamic Feed-Back）算法的詳細分析，提出了一種改進的動態反饋負載均衡算法。該算法通過收集每臺服務器的實時性能參數，動態地計算出各服務節點的分配概率，并由此決定用戶請求分配給哪一個服務節點。通過對上述三種算法性能的測試，得出了該算法能夠有效提高集群系統性能的結論。
上傳時間： 2013-11-23
上傳用戶：gxy670166755
Industrial systems demand semiconductors that are precise, flexibleand reliable. Linear Technology offers a broad line of high performanceanalog ICs that simplify system design with rugged devices featuringparameters fully guaranteed over the -40°C to 85°C temperature range.We back this up with knowledgeable applications support, long productlife cycles and superior on-time delivery.
上傳時間： 2013-11-02
上傳用戶：xiaodu1124
The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for high-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.
上傳時間： 2013-12-20
上傳用戶：zhangxin
Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working environment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.
標簽： Creating Machines Mentor State
上傳時間： 2013-10-08
上傳用戶：wangzhen1990
Abstract: Investment in smart meters and smart grid end equipment continues to grow worldwide as countriestry to make their electric delivery systems more efficient. However, as critical as the electric deliveryinfrastructure is, it is normally not secured and thus subject to attack. This article describes the concept oflife-cycle security—the idea that embedded equipment in the smart grid must have security designed into theentire life of the product, even back to the contract manufacturer. We also talk about how life-cycle securityapplies to embedded equipment in the smart grid. Potential threats are discussed, as are potential solutionsto mitigate the risks posed by those threats.
上傳時間： 2014-12-24
上傳用戶：熊少鋒
針對目前汽車追尾事件頻發問題，提出一種防汽車車前和車后追尾的安全裝置設計。該設計以高性能、低功耗的8位AVR微處理器ATmega8L為核心，結合霍爾式車速傳感器、激光雷達測距裝置和MMA7260QT加速度傳感器，能夠兼顧車前和車后，摒棄以往設計中只考慮車前或車后單一性缺點，尤其適用于高速、夜晚或新手行車。 Abstract: Aiming at the high frequency of vehicle rear-end collision，a safe device design of anti-vehicle rear-end collision is presented.In the design，the high-performance，low-power8-bit AVR microprocessor ATmega8L is utilized as a core combined with Hall-type speed sensor，laser-radar ranging devices and the acceleration sensor MMA7260QT.The design considers both the front and back of a car，and overcomes the drawbacks of former designs in which only the front or the back of the car is considered，so it is especially suitable for high-speed，night or the beginner’s driving.
上傳時間： 2013-10-14
上傳用戶：GavinNeko
介紹一種簡單射頻識別系統設計。該設計包括閱讀器、應答器和線圈3部分。由單片機控制閱讀器向應答器發射無線信號，并接收應答器回送的信號，再通過分析回送信號識別物品。閱讀器和應答器之間以半雙工通信方式通信。 Abstract: A simple design of radio frequency identification system is given in this paper.The design includes reader,responder and winding.Through MCU，signals are sent to responder from reader，then corresponding signals are sent back. According to the analysis of the signals sent back，the objects can be identified.Half-duplex communication is adopted? between? reader? and? responder.
上傳時間： 2013-10-11
上傳用戶：plsee
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
上傳時間： 2013-10-09
上傳用戶：3294322651
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
上傳時間： 2014-11-22
上傳用戶：xcy122677
