This the source release kit for the following system configuration(s):
- AMD Alchemy(TM) DBAu1200(TM) and AMD Alchemy(TM) Pb1200(TM)
development boards (AMD Alchemy(TM) Au1200(TM) processor)
- Windows CE 5.0
- RMI Au1200 Core BSP v1.51
- RMI Au1200 Media BSP v1.51
** File name: target.h
** Last modified Date: 2004-09-17
** Last Version: 1.0
** Descriptions: header file of the specific codes for LPC2100 target boards
** Every project should include a copy of this file, user may modify it as ne
DESCRIPTION
===========
This example project shows how to use the IAR Embedded Workbench for ARM
to develop code for the Atmel AT91SAM9261 evaluation boards.
It shows basic use of parallel I/O, timer and the interrupt controller.
It starts by showing different patterns on the LED s separated by half second.
COMPATIBILITY
=============
The project is compatible with the AT91SAM9261-EK board.
It shows
you how to use the Quartus® II software to create and process your own
Nios II system design that interfaces with components on Nios
development boards.
CAN1.c and CAN2.c are a simple example of configuring a CAN network to
transmit and receive data on a CAN network, and how to move information to
and from CAN RAM message objects. Each C8051F040-TB CAN node is configured
to send a message when it s P3.7 button is depressed/released, with a 0x11
to indicate the button is pushed, and 0x00 when released. Each node also has
a message object configured to receive messages. The C8051 tests the
received data and will turn on/off the target board s LED. When one target
is loaded with CAN2.c and the other is loaded with CAN1.c, one target
board s push-button will control the other target board s LED, establishing
a simple control link via the CAN bus and can be observed directly on the
target boards.
This document constitutes the user manual for the YAMON™ ROM monitor.
YAMON (“Yet Another MONitor”) is the ROM monitor used on MIPS Technologies evaluation and reference boards.
The target audience for this document is users of those boards. This would typically be engineers developing hardware
or software including compilers, RTOS and other tools.
Currently, the following boards/CPUs are supported by YAMON :
• Atlas™ with MIPS32 4K™ or MIPS64 5K™ class of CPUs.
• Atlas with QED RM5261® .
• Malta™ with MIPS32 4K or MIPS64 5K class of CPUs.
• Malta with QED RM5261® .
• SEAD™ with MIPS32 4K or MIPS64 5K class of CPUs.
• SEAD-2™ with MIPS32 4K or MIPS64 5K class of CPUs.
The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.
Embedded Linux Primer: A Practical, Real-World Approach
presents a step-by-step walkthrough of porting Linux to custom boards and introduces real-time configuration via CONFIG_RT--one of today s most exciting developments in embedded Linux. You ll find especially detailed coverage of using development tools to analyze and debug embedded systems--including the art of kernel debugging.
This tutorial presents some basic concepts that can be helpful in debugging of application programs written in the Nios II assembly language, which run on Altera’s DE2 boards.
