Stereo-Vision circuit description, Aug 2002,
Ahmad Darabiha
This design contains four top level circuits: sv_chip0.vhd, sv_chip1.vhd, sv_chip2.vhd and
sv_chip3.vhd each of them built by one Virtex2000E fpga chip. This design is hierarchical and the
sub-circuits can be used as smaller benchmarks.
The circuit is drawn for measurement of acceleration from –1000 mg until + 1000 mg. It can be placed in kantra n the car and be supplied from the sheath of electric lighter. The circuit includes one indicative LED and a screen LCD.
