CANopen is a networking system based on the CAN serial bus.
CANopen assumes that the device’s hardware has a CAN transceiver
and CAN controller as specified in ISO 11898.
CANopen profile family specifies standardized communication
mechanisms and device functionality. The profile family is available
and maintained by CAN in Automation (CiA), the international users’
and manufacturers’ group and may be implemented license-free.
對(duì)于傳統(tǒng)的跑步機(jī)無法聯(lián)機(jī)組網(wǎng)，保存歷史數(shù)據(jù)，實(shí)時(shí)調(diào)試等問題，介紹了一個(gè)由多臺(tái)跑步機(jī)通過RS-232串行總線與上位機(jī)相連組成的跑步機(jī)聯(lián)網(wǎng)系統(tǒng)。系統(tǒng)采用W77E58作為下位機(jī)核心控制器件，它具有雙串行通訊端口，其中一個(gè)串口用于與變頻器通訊，另一個(gè)串口則與上位機(jī)相連，構(gòu)成跑步機(jī)網(wǎng)絡(luò)。
Abstract:
The traditional running machine can not be connected to a network, saving historical data, real time debug etc.In this paper,a new network system which is composed of running machines connected by a RS-232 communication bus is introduced.In the system,W77E58 is used as a core control unit.W77E58 has two serial ports,one is connected to the inverter and the other is connected to the PC. Thus a network appears.
The PCA82C250 and PCA82C251 are advanced transceiver products for use in automotive and general industrialapplications with transfer rates up to 1 Mbit/s. They support the differential bus signal representation beingdescribed in the international standard for in-vehicle CAN high-speed applications (ISO 11898). Controller AreaNetwork (CAN) is a serial bus protocol being primarily intended for transmission of control related data between anumber of bus nodes.
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
The PCA9546A is a quad bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
