The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.
上傳時間： 2013-10-13
上傳用戶：ytulpx
根據看門狗電路的原理，設計出簡單適用、性能可靠的1TrL型看門狗電路以及價格低廉、性能可靠的微功耗CMOS型看門狗電路，同時還介紹了常用的uP監視器O型看門狗電路。關鍵詞：看門狗電路；1TrL型；CMOS型Abstract：In accordance with the principle of WDT (Watch Dog Timer 1circuit，design a，IT．L type WTD circuit，it is a dimple an d applicable an d reliable on performanceo Design a CMOS type WTD circuit，it is low prices and mini-power consumption。Also the article describes a common uP type WTD circuit。Key word：WDT circuit；TFL type；CMOS typ e
上傳時間： 2013-11-05
上傳用戶：685
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
上傳時間： 2013-10-13
上傳用戶：13162218709
The Motorola MPC106 PCI bridge/memory controller provides a PowerPCªmicroprocessor common hardware reference platform (CHRPª) compliant bridgebetween the PowerPC microprocessor family and the Peripheral Component Interconnect(PCI) bus. In this document, the term Ô106Õ is used as an abbreviation for the phraseÔMPC106 PCI bridge/memory controllerÕ. This document contains pertinent physicalcharacteristics of the 106. For functional characteristics refer to theMPC106 PCI Bridge/Memory Controller UserÕs Manual.This document contains the following topics:Topic PageSection 1.1, ÒOverviewÓ 2Section 1.2, ÒFeaturesÓ 3Section 1.3, ÒGeneral ParametersÓ 5Section 1.4, ÒElectrical and Thermal CharacteristicsÓ 5Section 1.5, ÒPin AssignmentsÓ 17Section 1.6, ÒPinout Listings 18Section 1.7, ÒPackage DescriptionÓ 22Section 1.8, ÒSystem Design InformationÓ 24Section 1.9, ÒDocument Revision HistoryÓ 29Section 1.10, ÒOrdering InformationÓ 29
上傳時間： 2013-11-04
上傳用戶：as275944189
Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
上傳時間： 2013-10-27
上傳用戶：zhangyigenius
Abstract: This application note explains the hardware of different types of 1-Wire® interfaces and software examples adapted to this hardware with a focus on serial ports. Depending on the types of iButtons required for a project and the type of computer to be used, the most economical interface is easily found. The hardware examples shown are basically two different types: 5V general interface and 12V RS-232 interface. Within the 5V group a common printed circuit board could be used for all circuits described. The variations can be achieved by different populations of components. The same principal is used for the 12V RS-232 interface. The population determines if it is a Read all or a Read/Write all type of interface. There are other possible circuit implementations to create a 1-Wire interface. The circuits described in this application note cover many different configurations. For a custom application, one of the described options can be adapted to meet individual needs.
標簽： iButtons Reading Writing and
上傳時間： 2013-10-29
上傳用戶：long14578
單片機系統“PC”失控的軟件措施Software Measure of GettingO uto fC ontrolfo r“PC"in S ingleC hipC omputerS ystem謐 加 春 王 曉 基 雷 小 華(江 西 理 工 大 學機 電 工 程 學 院 ，贛 州 34 10 00)摘要單片機系統在實際工業現場中可能遇到各種干擾和自身的隨機性故障。現場惡劣的環境有可能使計算機系統發生異常，計算機程序指針“PC”失控就是常見的故障之一，如果發生“PC”失控，將導致CPI工作混亂，釀成嚴重的事故。研究了“PC”失控的原因，并指出軟件抗干擾的幾種方法，有效保證單片機系統的正常工作。關鍵詞單片機“PC”失控抗干擾Abstract Inp racticalin dustrialfi elds,th ereis v ariousin terferencea fectingo perationo fsi nglec hipc omputersy stemsa ndt hec omputersy stems。fac噸random faults飾themselves. It is very common that the severe environment makes the computer systems abnormal. The program counter "PC"gettingo utof co ntorlis on eo fth ec ommonfa ults.If th isoc curs,C PUw ouldb eru nningo utof or deran din torducesse riousan cient.T hec ausesof " PC"geting out of control， studied in this paper and some countermeasures of anti-interference師software are given to ensure single chip computer systemworking properly.Keywords Single。飾computer Porgramc ounter"P C" Anti-interfeernc 在設 計 和 開發單片機系統時，一般難以周全地預計單片機系統在實際工業現場中可能遇到的各種干擾和自身的隨機性故障。因此，除了采取防止和抑制干擾的各項措施外，還應該借助于軟件措施克服某些干擾，系統還應具備迅速自行恢復的能力。本文介紹的應對單片機系統PC失控的軟件措施，設計靈活，節省硬件資源，能保證測控系統長期可靠地運行。MC S- 5 1單片機以其優良的性能價格比大量應用于工業現場測試和控制領域。但是，現場惡劣的環境有可能使計算機系統發生異常，計算機程序指針PC失控就是常見的故障之一，一旦發生PC“走飛”，計算機系統就會出現工作混亂，釀成嚴重的事故。為 了 在 CP 失控時盡量減少由此帶來的不利影響，并盡快使系統恢復正常，需要采取一定的軟件措施和硬件措施。常見的硬件措施有“看門狗”電路。軟件措施設置的前提條件是:①在干擾作用下，微機系統硬件部分不會受到任何損壞，或者損壞部分設置有監測狀態可供查詢;②程序區不會受到干擾侵害。單片機系統的程序和表格以及重要的參數均設置在ROM區，不會因干擾的侵人而改變;③ RAM區中的重要數據不會被破壞，或者雖然被破壞，但是可以重新建立。
上傳時間： 2013-11-02
上傳用戶：bhqrd30
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上傳時間： 2013-11-14
上傳用戶：fdmpy
一篇長90頁的PPT和10個左右的示例源程序，對于自學能力強且有一定計算機編程基礎的人來說上手還是很快的。 •Understand the components of a Virtual Instrument •Introduce labview and common labview functions •Build a simple data acquisition application •Create a subroutine in labview
上傳時間： 2013-11-21
上傳用戶：yeling1919
在研究傳統家用燃氣報警器的基礎上，以ZigBee協議為平臺，構建mesh網狀網絡實現網絡化的智能語音報警系統。由于傳感器本身的溫度和實際環境溫度的影響，傳感器標定后采用軟件補償方法。為了減少系統費用，前端節點采用半功能節點設備，路由器和協調器采用全功能節點設備，構建mesh網絡所形成的家庭內部報警系統，通過通用的電話接口連接到外部的公用電話網絡，啟動語音模塊進行報警。實驗結果表明，在2.4 GHz頻率下傳輸，有墻等障礙物的情況下，節點的傳輸距離大約為35 m，能夠滿足家庭需要，且系統工作穩定，但在功耗方面仍需進一步改善。 Abstract: On the basis of studying traditional household gas alarm system, this paper proposed the platform for the ZigBee protocol，and constructed mesh network to achieve network-based intelligent voice alarm system. Because of the sensor temperature and the actual environment temperature, this system design used software compensation after calibrating sensor. In order to reduce system cost, semi-functional node devices were used as front-end node, however, full-function devices were used as routers and coordinator，constructed alarm system within the family by building mesh network，connected to the external public telephone network through the common telephone interface, started the voice alarm module. The results indicate that nodes transmit about 35m in the distance in case of walls and other obstacles by 2.4GHz frequency transmission, this is able to meet family needs and work steadily, but still needs further improvement in power consumption.
上傳時間： 2013-10-30
上傳用戶：swaylong
