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counter

we will use the Spartan3 XC3S200 FPGA to design a specified counter using the language VHDL.

we will use the Spartan3 XC3S200 FPGA to design a specified counter using the language VHDL.

標(biāo)簽： the specified Spartan3 language

上傳時(shí)間： 2015-05-13

上傳用戶：youke111
counter and adder program by vhdl. Just enjoy it!

counter and adder program by vhdl. Just enjoy it!

標(biāo)簽： counter program adder enjoy

上傳時(shí)間： 2015-06-15

上傳用戶：x4587
PWM/TIMER/counter VHDL IP core

PWM/TIMER/counter VHDL IP core

標(biāo)簽： counter TIMER VHDL core

上傳時(shí)間： 2015-08-11

上傳用戶：啊颯颯大師的
ICCAVR Rainguage counter program

ICCAVR Rainguage counter program

標(biāo)簽： Rainguage counter program ICCAVR

上傳時(shí)間： 2013-12-25

上傳用戶：xfbs821
his design is the initial design when the board is powered-up. It increments a counter and displays

his design is the initial design when the board is powered-up. It increments a counter and displays the value on the 7-segment displays and LEDs. An image is also displayed on the VGA port.

標(biāo)簽： design increments powered-up the

上傳時(shí)間： 2014-01-17

上傳用戶：003030
counter a numbder for learning labview

counter a numbder for learning labview

標(biāo)簽： learning counter numbder labview

上傳時(shí)間： 2014-01-09

上傳用戶：372825274
A system to manage a grocery store with a single cash counter.

A system to manage a grocery store with a single cash counter.

標(biāo)簽： grocery counter system manage

上傳時(shí)間： 2016-03-05

上傳用戶：zm7516678
wm-timer,it s a code for mfc c++ time counter

wm-timer,it s a code for mfc c++ time counter

標(biāo)簽： wm-timer counter code time

上傳時(shí)間： 2016-03-19

上傳用戶：頂?shù)弥?/p>
1、整個(gè)程序共三個(gè)文件（數(shù)據(jù)庫(kù)、WEB頁(yè)面、頁(yè)面調(diào)用) 2、調(diào)用后顯示：總IP量、今日訪問(wèn)量、今日IP量、昨日IP量、最高IP量、平均IP量、共統(tǒng)計(jì)天數(shù) 3、打開(kāi)counter.asp就可以任意調(diào)整顯

1、整個(gè)程序共三個(gè)文件（數(shù)據(jù)庫(kù)、WEB頁(yè)面、頁(yè)面調(diào)用) 2、調(diào)用后顯示：總IP量、今日訪問(wèn)量、今日IP量、昨日IP量、最高IP量、平均IP量、共統(tǒng)計(jì)天數(shù) 3、打開(kāi)counter.asp就可以任意調(diào)整顯示需要的數(shù)據(jù) 4、可以隨意查詢某天的訪問(wèn)量

標(biāo)簽： counter WEB asp 頁(yè)

上傳時(shí)間： 2014-12-22

上傳用戶：sssl
avr encoder counter source code project. read out encoder and send to UART. implemented on ATMega1

avr encoder counter source code project. read out encoder and send to UART. implemented on ATMega16

標(biāo)簽： encoder implemented ATMega1 counter

上傳時(shí)間： 2014-01-13

上傳用戶：330402686

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counter

we will use the Spartan3 XC3S200 FPGA to design a specified counter using the language VHDL.

counter and adder program by vhdl. Just enjoy it!

PWM/TIMER/counter VHDL IP core

ICCAVR Rainguage counter program

his design is the initial design when the board is powered-up. It increments a counter and displays

counter a numbder for learning labview

A system to manage a grocery store with a single cash counter.

wm-timer,it s a code for mfc c++ time counter

avr encoder counter source code project. read out encoder and send to UART. implemented on ATMega1