本文依據(jù)集成電路設(shè)計(jì)方法學(xué),探討了一種基于標(biāo)準(zhǔn)Intel 8086 微處理器的單芯片計(jì)算機(jī)平臺(tái)的架構(gòu)。研究了其與SDRAM,8255 并行接口等外圍IP 的集成,并在對(duì)AMBA協(xié)議和8086 cpu分析的基礎(chǔ)上,采用遵從AMBA傳輸協(xié)議的系統(tǒng)總線代替?zhèn)鹘y(tǒng)的8086 cpu三總線結(jié)構(gòu),搭建了基于8086 IP 軟核的單芯片計(jì)算機(jī)系統(tǒng),并實(shí)現(xiàn)了FPGA 功能演示。關(guān)鍵詞:微處理器; SoC;單芯片計(jì)算機(jī);AMBA 協(xié)議
Design of 8086 cpu Based Computer-on-a-chip System(School of Electrical Engineering and Automation, Heifei University of Technology, Hefei, 230009,China)Abstract: According to the IC design methodology, this paper discusses the design of one kind of Computer-on-a-chip system architecture, which is based on the standard Intel8086 microprocessor,investigates how to integrate the 8086 cpu and peripheral IP such as, SDRAM controller, 8255 PPI etc. Based on the analysis of the standard Intel8086 microprocessor and AMBA Specification,the Computer-on-a-chip system based on 8086 cpu which uses AMBA bus instead of traditional three-bus structure of 8086 cpu is constructed, and the FPGA hardware emulation is fulfilled.Key words: Microprocessor; SoC; Computer-on-a-chip; AMBA Specification
標(biāo)簽:
8086
cpu
單芯片
計(jì)算機(jī)系統(tǒng)
上傳時(shí)間:
2013-12-27
上傳用戶:kernor
一種實(shí)用的單片機(jī)雙cpu設(shè)計(jì)方案及其應(yīng)用:針對(duì)傳統(tǒng)儀表具有的硬件資源不足、速度慢等功能缺陷,提出了一種基于單片機(jī)的cpu設(shè)計(jì)方案,即擴(kuò)展cpu,直接從主cpu對(duì)應(yīng)的數(shù)據(jù)顯示I/O口上獲取數(shù)據(jù),這種獲取數(shù)據(jù)的雙cpu設(shè)計(jì)方案中主從cpu之間在功能上相互獨(dú)立,主cpu不受擴(kuò)展cpu加入的影響,實(shí)現(xiàn)其固有功能,保證了測(cè)量數(shù)據(jù)的準(zhǔn)確性;擴(kuò)展cpu從主cpu中獲取數(shù)據(jù),不受主cpu的控制,按照現(xiàn)場(chǎng)的需求進(jìn)行功能擴(kuò)展。給出了詳細(xì)的軟硬件設(shè)計(jì)結(jié)構(gòu)。該方案為傳統(tǒng)儀表的升級(jí)改造提供了一種新思路,實(shí)踐證明是可行的。關(guān)鍵詞: 傳統(tǒng)儀表 檢測(cè)系統(tǒng) 單片機(jī)
標(biāo)簽:
cpu
單片機(jī)
設(shè)計(jì)方案
上傳時(shí)間:
2013-10-30
上傳用戶:evil