cursor屏幕編程-顯示共享內存中的信息
上傳時間： 2015-02-10
上傳用戶：WMC_geophy
* This function positions the cursor at the specified * x,y coordinate. It uses the ANSI standard ESCAPE * * sequence to produce the desired effect. Its not the * * fastest way to position the cursor, but perhaps the * * most portable. *
標簽： the coordinate positions specified
上傳時間： 2015-02-24
上傳用戶：chenjjer
這是一個使用了 cursor 編程技術實現(xiàn)的車站自動售票系統(tǒng)的源代碼，其中也包含了一些數(shù)據(jù)庫操作員技術。
標簽： cursor 編程 技術實現(xiàn) 售票系統(tǒng)
上傳時間： 2014-01-18
上傳用戶：banyou
此為open haptics的應用。需要phantom儀器進行操作。模擬的是一個cursor去觸摸一個球。你能得到觸覺和視覺的反饋
標簽： haptics phantom cursor open
上傳時間： 2014-01-02
上傳用戶：ruixue198909
Canvas Drawing and Dyanamic cursor change
標簽： Dyanamic Drawing Canvas cursor
上傳時間： 2017-04-04
上傳用戶：蠢蠢66
The idea is to track mouse cursor movement over the screen, and show enlarged (2x to 8x) section around the cursor, in the image control
標簽： enlarged movement section cursor
上傳時間： 2017-07-04
上傳用戶：cc1
Argh! Where s my mouse? Ah look at the eyes .... there it is! )) Mouse Eyes is another mouse cursor follower. Mouse eyes idea is indicating which direction to look in to find your mouse cursor.
標簽： mouse another cursor Where
上傳時間： 2014-11-24
上傳用戶：asdfasdfd
Its project to move your mouse cursor on a vga monitor. it is very funny -)
標簽： project monitor cursor mouse
上傳時間： 2013-12-22
上傳用戶：wxhwjf
to become acquainted with a concept « cursor» language of SQL, by the types of cursors, to study the process of creation and application of cursors. To consider the examples of the use of cursors at creation of SQL of queries.
標簽： acquainted language concept cursors
上傳時間： 2013-12-24
上傳用戶：libenshu01
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2013-10-15
上傳用戶：busterman
