<acronym id="i8gmk"></acronym>
<center id="i8gmk"></center>
Main program running when workpiece is ready on deferent belt(deferent_ready=ture). * Call Square_Wave subroutine to generate 0.5ms square wave on P1.2 to drive * electromotor,then drive deferent belt step forward. When it steps to the measure * zone, it stops to be measured. Then call A_D subroutine to transform analog * signals to digital signals , after then call serial subroutine to transfer * digital signals to PC. Call square wave subroutine to drive deferent belt step to * original position waitting for defere ready flag to run the next circle.
標簽： deferent_ready workpiece deferent program
上傳時間： 2017-08-31
上傳用戶：baiom
RSA ( Rivest Shamir Adleman )is crypthograph system that used to give a secret information and digital signature . Its security based on Integer Factorization Problem (IFP). RSA uses an asymetric key. RSA was created by Rivest, Shamir, and Adleman in 1977. Every user have a pair of key, public key and private key. Public key (e) . You may choose any number for e with these requirements, 1< e <Æ (n), where Æ (n)= (p-1) (q-1) ( p and q are first-rate), gcd (e,Æ (n))=1 (gcd= greatest common divisor). Private key (d). d=(1/e) mod(Æ (n)) Encyption (C) . C=Mª mod(n), a = e (public key), n=pq Descryption (D) . D=C° mod(n), o = d (private key
標簽： crypthograph information Adleman Rivest
上傳時間： 2017-09-01
上傳用戶：chfanjiang
This is an analog signal communication simulator, usign frequency modulation. It is designed in MATLAB-Simulink. The communications channel beetween the transmitter and the reciever is supposed to be affected by additive white Gaussian noise.
標簽： communication modulation frequency simulator
上傳時間： 2013-12-25
上傳用戶：王楚楚
This is the source code of a digital clock implemented using Atmel 8 bit AVR Controller(ATMega16). To fully understand it look at the hardware implementation shown in attached photo(pdf).
標簽： implemented Controller digital ATMega
上傳時間： 2014-08-18
上傳用戶：moshushi0009
The digital Video Standard according to ITU-R BT. 601/656 有關接口的協議的大概描述
上傳時間： 2015-12-21
上傳用戶：dxw2006
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上傳時間： 2016-05-06
上傳用戶：fagong
16-, 14-, 12-Bit, Six-Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTERS
上傳時間： 2018-06-07
上傳用戶：nj精靈
DESCRIPTION The Texas Instruments MSP430 family of ultra-low-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 μs. The MSP430G2x13 and MSP430G2x53 series are ultra-low-power mixed signal microcontrollers with built-in 16- bit timers, up to 24 I/O capacitive-touch enabled pins, a versatile analog comparator, and built-in communication capability using the universal serial communication interface. In addition the MSP430G2x53 family members have a 10-bit analog-to-digital (A/D) converter. For configuration details see Table 1. Typical applications include low-cost sensor systems that capture analog signals, convert them to digital values, and then process the data for display or for transmission to a host system.
上傳時間： 2018-12-25
上傳用戶：ygyh
From the transition of analog to digital communication along with seamless mobility and high computing power of small handheld devices, the wireless communications industry has seen tremendous changes leading to the integration of several telecommunication networks, devices and services over last 30 years. The rate of this progress and growth has increased particularly in the past decade because people no longer use their devices and networks for voice only, but demand bundle contents such as data download/streaming, HDTV, HD video , 3D video conferencing with higher efficiency, seamless connectivity, intelligence, reliability and better user experience. Although the challenges facing service providers and telecommunication companies differ by product, region, market size, and their areas of concentration but time to market, efficient utilization of their assets and revenue expansion, have impacted significantly how to manage and conduct their business while maintaining sufficient margin.
標簽： Convergence Networks Beyond 4G of
上傳時間： 2020-05-26
上傳用戶：shancjb
The bookl tell the analog Analog and Digital Communications and Analog and Digital Communications Laboratory
標簽： Communication Digital Systems
上傳時間： 2020-05-27
上傳用戶：shancjb
<li id="oeiog"></li> <strike id="oeiog"></strike>