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This manual describes Freescale’s IEEE™ 802.15.4 Standard compliant MAC/PHY software. The Freescale 802.15.4 MAC/PHY software is designed for use with the Freescale MC1319x and MC1320x, family of short range, low power, 2.4 GHz Industrial, Scientific, and Medical (ISM) band transceivers, designed for use with the HCS08 Family of MCUs. The MAC/PHY software also works with the MC1321x family of short range, low power, 2.4 GHz ISM band transceivers that incorporate a low power 2.4 GHz radio frequency transceiver and an 8-bit microcontroller into a single LGA package.
Throughout this manual, the term transceiver refers to either the MC1319x, MC1320x, or the internal counterpart inside the MC1321x System in a Package (SiP).
標(biāo)簽：
Freescale
describes
compliant
Standard
上傳時間：
2016-04-17
上傳用戶：caiiicc
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This program is a RADIUS RFC-compliant daemon, which is derived from
original Livingston Enterprise Inc. (now Lucent Inc.) RADIUS daemon
release 2.1. It adds a number of useful features to the LE daemon, i.e.
標(biāo)簽：
RFC-compliant
Livingston
Enterprise
original
上傳時間：
2016-08-20
上傳用戶：jichenxi0730
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Sofia SIP is an open-source SIP User-Agent library, compliant with
the IETF RFC3261 specification. It can be used as a building block
for SIP client software for uses such as VoIP, IM, and many other
real-time and person-to-person communication services. The primary
target platform for Sofia SIP is GNU/Linux. Sofia SIP is based on a
SIP stack developed at the Nokia Research Center. Sofia SIP is
licensed under the LGPL.
標(biāo)簽：
specification
open-source
User-Agent
SIP
上傳時間：
2016-08-25
上傳用戶：asasasas
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高階譜工具箱 Version 2.0.3 (R12 compliant) 27 Dec 2
標(biāo)簽：
compliant
Version
R12
Dec
上傳時間：
2014-08-17
上傳用戶：yy541071797
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Example script to read CF-compliant structured grid NetCDF
data into Matlab using the NetCDF-Java libraryI m using "toolsUI.jar" which is advertised as "a nice fat jar
file containing everything in a single jar"
標(biāo)簽：
CF-compliant
NetCDF-Jav
structured
Example
上傳時間：
2017-06-30
上傳用戶：gmh1314
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Code Composer Studio是TI eXpressDSPTM實(shí)時軟件技術(shù)的重要組成部分,它可以使開發(fā)人員充分應(yīng)用DSP的強(qiáng)大弁遄C隨著TI的TMS320C5000 和TMS320C6000 DSP平臺的應(yīng)用范圍不斷擴(kuò)大,已經(jīng)由其應(yīng)用于下載視頻流的手持因特網(wǎng)接入產(chǎn)品擴(kuò)展到蜂窩通信網(wǎng)路和光網(wǎng)絡(luò)的通信基礎(chǔ)設(shè)施,eXpressDSPTM也便獲得了越來越多軟件工程師的青睞。eXpressDSP還包含了DSP/BIOS可伸縮內(nèi)核,TMS320TMDSP標(biāo)準(zhǔn)算法的應(yīng)用互操作性和可重復(fù)使用性以及400多家第三
標(biāo)簽：
Composer
Studio
Code
3.1
上傳時間：
2013-06-23
上傳用戶：zzy7826
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This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
標(biāo)簽：
Modelling
Guide
Navy
VHDL
上傳時間：
2014-12-23
上傳用戶：xinhaoshan2016
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One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions
標(biāo)簽：
Verilog
編碼
非阻塞性賦值
上傳時間：
2013-10-17
上傳用戶：tb_6877751
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The Motorola MPC106 PCI bridge/memory controller provides a PowerPCªmicroprocessor common hardware reference platform (CHRPª) compliant bridgebetween the PowerPC microprocessor family and the Peripheral Component Interconnect(PCI) bus. In this document, the term Ô106Õ is used as an abbreviation for the phraseÔMPC106 PCI bridge/memory controllerÕ. This document contains pertinent physicalcharacteristics of the 106. For functional characteristics refer to theMPC106 PCI Bridge/Memory Controller UserÕs Manual.This document contains the following topics:Topic PageSection 1.1, ÒOverviewÓ 2Section 1.2, ÒFeaturesÓ 3Section 1.3, ÒGeneral ParametersÓ 5Section 1.4, ÒElectrical and Thermal CharacteristicsÓ 5Section 1.5, ÒPin AssignmentsÓ 17Section 1.6, ÒPinout Listings 18Section 1.7, ÒPackage DescriptionÓ 22Section 1.8, ÒSystem Design InformationÓ 24Section 1.9, ÒDocument Revision HistoryÓ 29Section 1.10, ÒOrdering InformationÓ 29
標(biāo)簽：
MPC
106
PCI
存儲器
上傳時間：
2013-11-04
上傳用戶：as275944189
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The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.
標(biāo)簽：
Demonstration
3200
USB
for
上傳時間：
2014-02-27
上傳用戶：zhangzhenyu
