-
This is End User Control Program
標(biāo)簽：
Control
Program
This
User
上傳時(shí)間：
2017-03-11
上傳用戶：cc1
-
Use of this source code is subject to the terms of the Microsoft end-user
標(biāo)簽：
Microsoft
the
end-user
subject
上傳時(shí)間：
2013-12-18
上傳用戶：rishian
-
The goal of this library is to make ODBC recordsets look just like an STL container. As a user, you can move through our containers using standard STL iterators and if you insert(), erase() or replace() records in our containers changes can be automatically committed to the database for you. The library s compliance with the STL iterator and container standards means you can plug our abstractions into a wide variety of STL algorithms for data storage, searching and manipulation. In addition, the C++ reflection mechanism used by our library to bind to database tables allows us to add generic indexing and lookup properties to our containers with no special code required from the end-user. Because our code takes full advantage of the template mechanism, it adds minimal overhead compared with using raw ODBC calls to access a database.
標(biāo)簽：
recordsets
container
library
ODBC
上傳時(shí)間：
2015-10-11
上傳用戶：xlcky
-
Deliver more functionality to the end-user sooner and more cost-effectively
標(biāo)簽：
Speech_Lifeng
Welcome
ARM
上傳時(shí)間：
2014-01-13
上傳用戶：lifangyuan12
-
On the LPC13xx, programming, erasure and re-programming of the on-chip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UART serial port, the ISP command handler (resides in the bootloader) allows erasure of one or more sector (s) of the on-chip flash memory.
標(biāo)簽：
1300
LPC
勘誤
數(shù)據(jù)手冊(cè)
上傳時(shí)間：
2013-12-13
上傳用戶：lmq0059
-
The MIPS32® 4KEm™ core from MIPS® Technologies is a member of the MIPS32 4KE™ processor core family. It is a
high-performance, low-power, 32-bit MIPS RISC core designed for custom system-on-silicon applications. The core is
designed for semiconductor manufacturing companies, ASIC developers, and system OEMs who want to rapidly integrate
their own custom logic and peripherals with a high-performance RISC processor. It is highly portable across processes, and
can be easily integrated into full system-on-silicon designs, allowing developers to focus their attention on end-user
products. The 4KEm core is ideally positioned to support new products for emerging segments of the digital consumer,
network, systems, and information management markets, enabling new tailored solutions for embedded applications.
標(biāo)簽：
MIPS
8482
Technologies
174
上傳時(shí)間：
2014-12-22
上傳用戶：semi1981
-
Java technology is both a programming language and a platform. The Java programming language originated as part of a research project to develop advanced software for a wide variety of network devices and embedded systems. The goal was to develop a small, reliable, portable, distributed, real-time operating platform. When the project started, C++ was the language of choice. But over time the difficulties encountered with C++ grew to the point where the problems could best be addressed by creating an entirely new language platform. Design and architecture decisions drew from a variety of languages such as Eiffel, SmallTalk, Objective C, and Cedar/Mesa. The result is a language platform that has proven ideal for developing secure, distributed, network-based end-user applications in environments ranging from network-embedded devices to the World-Wide Web and the desktop
標(biāo)簽：
programming
language
Java
technology
上傳時(shí)間：
2014-01-03
上傳用戶：huangld
-
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core.
TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms.
The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations.
Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference.
The TAS3204 is composed of eight functional blocks:
Clocking System
Digital Audio Interface
Analog Audio Interface
Power supply
Clocks, digital PLL
I2C control interface
8051 MCUcontroller
Audio DSP – digital audio processing
特性
Digital Audio Processor
Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment
135-MHz Operation
48-Bit Data Path With 76-Bit Accumulator
Hardware Single-Cycle Multiplier (28 × 48)
標(biāo)簽：
3204
tas
上傳時(shí)間：
2016-05-06
上傳用戶：fagong
-
The General Packet Radio Service (GPRS) allows an end user to send and
receive data in packet transfer mode within a public land mobile network
(PLMN) without using a permanent connection between the mobile station
(MS) and the external network during data transfer. This way, GPRS opti-
mizes the use of network and radio resources (RRs) since, unlike circuit-
switched mode, no connection between the MS and the external network is
established when there is no data flow in progress. Thus, this RR optimiza-
tion makes it possible for the operator to offer more attractive fees.
標(biāo)簽：
Mobile
EDGE
上傳時(shí)間：
2020-05-27
上傳用戶：shancjb
-
This book addresses two aspects of network operation quality; namely, resource
management and fault management.
Network operation quality is among the functions to be fulfilled in order to offer
quality of service, QoS, to the end user. It is characterized by four parameters:
– packet loss;
– delay;
– jitter, or the variation of delay over time;
– availability.
Resource management employs mechanisms that enable the first three parameters
to be guaranteed or optimized. Fault management aims to ensure continuity of service.
標(biāo)簽：
Ethernet
Networks
MPLS
and
IP
上傳時(shí)間：
2020-05-27
上傳用戶：shancjb
