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ensemble

  • Show work of ODE45 function. As the example use lorenz equation. Example show ensemble Puankare and

    Show work of ODE45 function. As the example use lorenz equation. Example show ensemble Puankare and phase picture

    標(biāo)簽: Puankare function equation ensemble

    上傳時(shí)間: 2014-10-13

    上傳用戶:qiao8960

  • Description: FASBIR(Filtered Attribute Subspace based Bagging with Injected Randomness) is a variant

    Description: FASBIR(Filtered Attribute Subspace based Bagging with Injected Randomness) is a variant of Bagging algorithm, whose purpose is to improve accuracy of local learners, such as kNN, through multi-model perturbing ensemble. Reference: Z.-H. Zhou and Y. Yu. Ensembling local learners through multimodal perturbation. IEEE Transactions on Systems, Man, and Cybernetics - Part B: Cybernetics, 2005, vol.35, no.4, pp.725-735.

    標(biāo)簽: Description Randomness Attribute Filtered

    上傳時(shí)間: 2015-04-10

    上傳用戶:ynzfm

  • Description: C4.5Rule-PANE is a rule learning method which could generate accurate and comprehensibl

    Description: C4.5Rule-PANE is a rule learning method which could generate accurate and comprehensible symbolic rules, through regarding a neural network ensemble as a pre-process of a rule inducer. Reference: Z.-H. Zhou and Y. Jiang. Medical diagnosis with C4.5 rule preceded by artificial neural network ensemble. IEEE Transactions on Information Technology in Biomedicine, 2003, vol.7, no.1, pp.37-42. 使用神經(jīng)網(wǎng)絡(luò)集成方法診斷糖尿病,肝炎,乳腺癌癥的案例研究.

    標(biāo)簽: comprehensibl Description Rule-PANE accurate

    上傳時(shí)間: 2013-11-30

    上傳用戶:wcl168881111111

  • NeC4.5 is a variant of C4.5 decision tree, which could generate decision trees more accurate than st

    NeC4.5 is a variant of C4.5 decision tree, which could generate decision trees more accurate than standard C4.5 decision trees, through regarding a neural network ensemble as a pre-process of C4.5 decision tree.

    標(biāo)簽: decision 4.5 accurate generate

    上傳時(shí)間: 2013-12-10

    上傳用戶:anng

  • Lorsque vous créez et enregistrez des documents Macromedia Flash MX 2004 et Macromedia Flash MX Pro

    Lorsque vous créez et enregistrez des documents Macromedia Flash MX 2004 et Macromedia Flash MX Professionnel 2004 dans l’environnement auteur de Flash, ils sont au format FLA. Pour afficher un document dans Macromedia Flash Player, vous devez le publier ou l’exporter au format SWF. Remarque : Pour plus d’informations sur la publication ou l’exportation d’un fichier, consultez le Chapitre 15, Publication, page 299 ou le Chapitre 16, Exportation, page 333. Vous pouvez ajouter du contenu multimédia à un document Flash et gérer ce contenu dans la bibliothèque. L’explorateur d’animations vous permet d’afficher et d’organiser l’ensemble des éléments dans un document Flash. Les options Annuler et Répéter, le panneau Historique et le menu Commandes vous permettent d’automatiser vos tâ ches dans un document.

    標(biāo)簽: Macromedia Flash enregistrez documents

    上傳時(shí)間: 2017-07-12

    上傳用戶:epson850

  • base implementaion of the protein (starting from the amino acid sequence) feature extractor used in

    base implementaion of the protein (starting from the amino acid sequence) feature extractor used in "L. Nanni and A. Lumini, An ensemble of Support Vector Machines for predicting virulent proteins, Expert Systems With Applications, vol.36, no.4, pp.7458-7462, May 2009. "

    標(biāo)簽: implementaion extractor the starting

    上傳時(shí)間: 2017-08-02

    上傳用戶:wqxstar

  • GPIB接口總線控制芯片的研究與設(shè)計(jì)

    GPIB為PC機(jī)與可編程儀器之間的連接系統(tǒng)定義了電氣、機(jī)械、功能和軟件特性。在自動(dòng)測(cè)試領(lǐng)域中,GPIB通用接口是測(cè)試儀器常用的接口方式,具有一定的優(yōu)勢(shì)。通過(guò)GPIB組建自動(dòng)測(cè)試系統(tǒng)方便且費(fèi)用低廉。而GPIB控制芯片是自動(dòng)測(cè)試系統(tǒng)中的關(guān)鍵芯片。目前,此類芯片只有國(guó)外少數(shù)公司生產(chǎn),不僅價(jià)格昂貴,而且購(gòu)買不便。因此,GPIB接口芯片的國(guó)產(chǎn)化、自主化對(duì)我國(guó)的自動(dòng)測(cè)試產(chǎn)業(yè)具有重大的意義。本文通過(guò)對(duì)IEEE-488協(xié)議的理解與裁減,定義了一款包含具有講者,聽者,控者三個(gè)功能的GPIB接口控制規(guī)范。采用標(biāo)準(zhǔn)數(shù)字IC設(shè)計(jì)流程,對(duì)協(xié)議狀態(tài)機(jī)化簡(jiǎn)后,進(jìn)行了RTL級(jí)的Verilog編碼設(shè)計(jì),基于FPGA進(jìn)行了原型驗(yàn)證。根據(jù)需要,對(duì)芯片的內(nèi)部進(jìn)行了時(shí)鐘門控處理來(lái)降低功耗。采用芯片引腳復(fù)用和JTAG測(cè)試原理,對(duì)芯片內(nèi)部增加了測(cè)試電路,方便了內(nèi)部狀態(tài)的測(cè)試,實(shí)現(xiàn)了可測(cè)試性設(shè)計(jì)。該芯片的工作時(shí)鐘頻率為8MHz,通過(guò)Synopsys的工具DC對(duì)源代碼進(jìn)行了綜合;使用PT對(duì)設(shè)計(jì)進(jìn)行了靜態(tài)時(shí)序分析;采用Cadence公司的Silicon ensemble對(duì)綜合后的網(wǎng)表進(jìn)行了版圖設(shè)計(jì),對(duì)芯片內(nèi)部的電源網(wǎng)絡(luò)和時(shí)鐘樹做了特殊處理,在國(guó)外的某5V0.5/m標(biāo)準(zhǔn)數(shù)字單元庫(kù)下進(jìn)行了mapping,芯片規(guī)模10萬(wàn)門左右,裸片面積為1.5mm×1.7mm。

    標(biāo)簽: gpib 接口 總線控制芯片

    上傳時(shí)間: 2022-06-25

    上傳用戶:zhaiyawei

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