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envirOnment

  • raw des source code written in cpp (integrated development envirOnment independent)

    raw des source code written in cpp (integrated development envirOnment independent)

    標(biāo)簽: development envirOnment independent integrated

    上傳時間: 2013-12-17

    上傳用戶:ccclll

  • I2C verilog HDL code including test envirOnment

    I2C verilog HDL code including test envirOnment

    標(biāo)簽: envirOnment including verilog code

    上傳時間: 2017-09-06

    上傳用戶:xlcky

  • I2S verilog HDL code including test envirOnment

    I2S verilog HDL code including test envirOnment

    標(biāo)簽: envirOnment including verilog code

    上傳時間: 2013-12-24

    上傳用戶:冇尾飛鉈

  • convert C programs for use in C++ compiler envirOnment

    convert C programs for use in C++ compiler envirOnment

    標(biāo)簽: envirOnment compiler programs convert

    上傳時間: 2017-09-14

    上傳用戶:ayfeixiao

  • Performance Evaluation in a two lane and four lane traffic envirOnment in case of a highway, urb

    Performance Evaluation in a two lane and four lane traffic envirOnment in case of a highway, urban congested traffic scenario and in a traffic jam

    標(biāo)簽: lane Performance envirOnment Evaluation

    上傳時間: 2017-09-21

    上傳用戶:xaijhqx

  • 板級光互連協(xié)議研究與FPGA實(shí)現(xiàn)

    隨著集成電路頻率的提高和多核時代的到來,傳統(tǒng)的高速電互連技術(shù)面臨著越來越嚴(yán)重的瓶頸問題,而高速下的光互連具有電互連無法比擬的優(yōu)勢,成為未來電互連的理想替代者,也成為科學(xué)研究的熱點(diǎn)問題。目前,由OIF(Optical Intemetworking Forum,光網(wǎng)絡(luò)論壇)論壇提出的甚短距離光互連協(xié)議,主要面向主干網(wǎng),其延遲、功耗、兼容性等都不能滿足板間、芯片間光互連的需要,因此,研究定制一種適用于板級、芯片級的光互連協(xié)議具有非常重要的研究意義。 本論文將協(xié)議功能分為數(shù)據(jù)鏈路層和物理層來設(shè)計,鏈路層功能包括了協(xié)議原語設(shè)計,數(shù)據(jù)幀格式和數(shù)據(jù)傳輸流程設(shè)計,流量控制機(jī)制設(shè)計,協(xié)議通道初始化設(shè)計,錯誤檢測機(jī)制設(shè)計和空閑字符產(chǎn)生、時鐘補(bǔ)償方式設(shè)計;物理層功能包含了數(shù)據(jù)的串化和解串功能,多通道情況下的綁定功能,數(shù)據(jù)編解碼功能等。 然后,文章采用FPGA(Field Programmable Gate Array,現(xiàn)場可編程門陣列)技術(shù)實(shí)現(xiàn)了定制協(xié)議的單通道模式。重點(diǎn)是數(shù)據(jù)鏈路層的實(shí)現(xiàn),物理層采用定制具備其功能的IP(Intellectual Property,知識產(chǎn)權(quán))——RocketIO來實(shí)現(xiàn)。實(shí)現(xiàn)的過程中,采用了Xilinx公司的ISE(Integrated System envirOnment,集成開發(fā)環(huán)境)開發(fā)流程,使用的設(shè)計工具包括:ISE,ModelSim,Synplify Pro,ChipScope等。 最后,本文對實(shí)現(xiàn)的協(xié)議進(jìn)行了軟件仿真和上扳測試,訪真和測試結(jié)果表明,實(shí)現(xiàn)的單通道模式,支持的最高串行頻率達(dá)到3.5GHz,完全滿足了光互連驗(yàn)證系統(tǒng)初期的要求,同時由RocketIO的高速串行差分口得到的眼圖質(zhì)量良好,表明對物理層IP的定制是成功的。

    標(biāo)簽: FPGA 板級 光互連 協(xié)議研究

    上傳時間: 2013-06-28

    上傳用戶:guh000

  • this is a sample about usb out transmission

    this is a sample about usb out transmission,it s default installation is D:\\RedLogic\\RCII_samples, and the software envirOnment is quatrusII 5.0,it is usefull for studying hardware and usb.

    標(biāo)簽: transmission sample about this

    上傳時間: 2013-08-24

    上傳用戶:座山雕牛逼

  • Creating Safe State Machines(Mentor)

      Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working envirOnment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.

    標(biāo)簽: Creating Machines Mentor State

    上傳時間: 2013-10-08

    上傳用戶:wangzhen1990

  • 高速PCB基礎(chǔ)理論及內(nèi)存仿真技術(shù)(經(jīng)典推薦)

    第一部分 信號完整性知識基礎(chǔ).................................................................................5第一章 高速數(shù)字電路概述.....................................................................................51.1 何為高速電路...............................................................................................51.2 高速帶來的問題及設(shè)計流程剖析...............................................................61.3 相關(guān)的一些基本概念...................................................................................8第二章 傳輸線理論...............................................................................................122.1 分布式系統(tǒng)和集總電路.............................................................................122.2 傳輸線的RLCG 模型和電報方程...............................................................132.3 傳輸線的特征阻抗.....................................................................................142.3.1 特性阻抗的本質(zhì).................................................................................142.3.2 特征阻抗相關(guān)計算.............................................................................152.3.3 特性阻抗對信號完整性的影響.........................................................172.4 傳輸線電報方程及推導(dǎo).............................................................................182.5 趨膚效應(yīng)和集束效應(yīng).................................................................................232.6 信號的反射.................................................................................................252.6.1 反射機(jī)理和電報方程.........................................................................252.6.2 反射導(dǎo)致信號的失真問題.................................................................302.6.2.1 過沖和下沖.....................................................................................302.6.2.2 振蕩:.............................................................................................312.6.3 反射的抑制和匹配.............................................................................342.6.3.1 串行匹配.........................................................................................352.6.3.1 并行匹配.........................................................................................362.6.3.3 差分線的匹配.................................................................................392.6.3.4 多負(fù)載的匹配.................................................................................41第三章 串?dāng)_的分析...............................................................................................423.1 串?dāng)_的基本概念.........................................................................................423.2 前向串?dāng)_和后向串?dāng)_.................................................................................433.3 后向串?dāng)_的反射.........................................................................................463.4 后向串?dāng)_的飽和.........................................................................................463.5 共模和差模電流對串?dāng)_的影響.................................................................483.6 連接器的串?dāng)_問題.....................................................................................513.7 串?dāng)_的具體計算.........................................................................................543.8 避免串?dāng)_的措施.........................................................................................57第四章 EMI 抑制....................................................................................................604.1 EMI/EMC 的基本概念..................................................................................604.2 EMI 的產(chǎn)生..................................................................................................614.2.1 電壓瞬變.............................................................................................614.2.2 信號的回流.........................................................................................624.2.3 共模和差摸EMI ..................................................................................634.3 EMI 的控制..................................................................................................654.3.1 屏蔽.....................................................................................................654.3.1.1 電場屏蔽.........................................................................................654.3.1.2 磁場屏蔽.........................................................................................674.3.1.3 電磁場屏蔽.....................................................................................674.3.1.4 電磁屏蔽體和屏蔽效率.................................................................684.3.2 濾波.....................................................................................................714.3.2.1 去耦電容.........................................................................................714.3.2.3 磁性元件.........................................................................................734.3.3 接地.....................................................................................................744.4 PCB 設(shè)計中的EMI.......................................................................................754.4.1 傳輸線RLC 參數(shù)和EMI ........................................................................764.4.2 疊層設(shè)計抑制EMI ..............................................................................774.4.3 電容和接地過孔對回流的作用.........................................................784.4.4 布局和走線規(guī)則.................................................................................79第五章 電源完整性理論基礎(chǔ)...............................................................................825.1 電源噪聲的起因及危害.............................................................................825.2 電源阻抗設(shè)計.............................................................................................855.3 同步開關(guān)噪聲分析.....................................................................................875.3.1 芯片內(nèi)部開關(guān)噪聲.............................................................................885.3.2 芯片外部開關(guān)噪聲.............................................................................895.3.3 等效電感衡量SSN ..............................................................................905.4 旁路電容的特性和應(yīng)用.............................................................................925.4.1 電容的頻率特性.................................................................................935.4.3 電容的介質(zhì)和封裝影響.....................................................................955.4.3 電容并聯(lián)特性及反諧振.....................................................................955.4.4 如何選擇電容.....................................................................................975.4.5 電容的擺放及Layout ........................................................................99第六章 系統(tǒng)時序.................................................................................................1006.1 普通時序系統(tǒng)...........................................................................................1006.1.1 時序參數(shù)的確定...............................................................................1016.1.2 時序約束條件...................................................................................1063.2 高速設(shè)計的問題.......................................................................................2093.3 SPECCTRAQuest SI Expert 的組件.......................................................2103.3.1 SPECCTRAQuest Model Integrity .................................................2103.3.2 SPECCTRAQuest Floorplanner/Editor .........................................2153.3.3 Constraint Manager .......................................................................2163.3.4 SigXplorer Expert Topology Development envirOnment .......2233.3.5 SigNoise 仿真子系統(tǒng)......................................................................2253.3.6 EMControl .........................................................................................2303.3.7 SPECCTRA Expert 自動布線器.......................................................2303.4 高速設(shè)計的大致流程...............................................................................2303.4.1 拓?fù)浣Y(jié)構(gòu)的探索...............................................................................2313.4.2 空間解決方案的探索.......................................................................2313.4.3 使用拓?fù)淠0弪?qū)動設(shè)計...................................................................2313.4.4 時序驅(qū)動布局...................................................................................2323.4.5 以約束條件驅(qū)動設(shè)計.......................................................................2323.4.6 設(shè)計后分析.......................................................................................233第四章 SPECCTRAQUEST SIGNAL EXPLORER 的進(jìn)階運(yùn)用..........................................2344.1 SPECCTRAQuest Signal Explorer 的功能包括:................................2344.2 圖形化的拓?fù)浣Y(jié)構(gòu)探索...........................................................................2344.3 全面的信號完整性(Signal Integrity)分析.......................................2344.4 完全兼容 IBIS 模型...............................................................................2344.5 PCB 設(shè)計前和設(shè)計的拓?fù)浣Y(jié)構(gòu)提取.......................................................2354.6 仿真設(shè)置顧問...........................................................................................2354.7 改變設(shè)計的管理.......................................................................................2354.8 關(guān)鍵技術(shù)特點(diǎn)...........................................................................................2364.8.1 拓?fù)浣Y(jié)構(gòu)探索...................................................................................2364.8.2 SigWave 波形顯示器........................................................................2364.8.3 集成化的在線分析(Integration and In-process Analysis) .236第五章 部分特殊的運(yùn)用...............................................................................2375.1 Script 指令的使用..................................................................................2375.2 差分信號的仿真.......................................................................................2435.3 眼圖模式的使用.......................................................................................249第四部分:HYPERLYNX 仿真工具使用指南............................................................251第一章 使用LINESIM 進(jìn)行前仿真.......................................................................2511.1 用LineSim 進(jìn)行仿真工作的基本方法...................................................2511.2 處理信號完整性原理圖的具體問題.......................................................2591.3 在LineSim 中如何對傳輸線進(jìn)行設(shè)置...................................................2601.4 在LineSim 中模擬IC 元件.....................................................................2631.5 在LineSim 中進(jìn)行串?dāng)_仿真...................................................................268第二章 使用BOARDSIM 進(jìn)行后仿真......................................................................2732.1 用BOARDSIM 進(jìn)行后仿真工作的基本方法...................................................2732.2 BoardSim 的進(jìn)一步介紹..........................................................................2922.3 BoardSim 中的串?dāng)_仿真..........................................................................309

    標(biāo)簽: PCB 內(nèi)存 仿真技術(shù)

    上傳時間: 2014-04-18

    上傳用戶:wpt

  • 為敏感電路提供過壓和電源反接保護(hù)

      What would happen if someone connected 24V to your12V circuits? If the power and ground lines were inadvertentlyreversed, would the circuits survive? Does yourapplication reside in a harsh envirOnment, where the inputsupply can ring very high or even below ground? Evenif these events are unlikely, it only takes one to destroya circuit board.

    標(biāo)簽: 敏感電路 保護(hù) 過壓 電源反接

    上傳時間: 2013-10-26

    上傳用戶:jackandlee

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