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event-driven

  • RS232.C was written to provide all of the basic functionality needed to employ serial I/O in any a

    RS232.C was written to provide all of the basic functionality needed to employ serial I/O in any application written with Borland C language compilers. Some features are: 1. Ease of use. No assembly language or library files are used and a simple "#include" statement is all that is required to access all of the functions provided. 2. Both input and output are buffered and interrupt driven for efficiency. 3. Serial ports 1 - 4 are supported on PC, AT and PS/2 compatibles.Chained interrupts used on port 3 and 4 are allowed for so as not to interfere with devices such as a mouse or printer. Transmission speeds of 110 to 115200 baud are available. 4. Detection and utilization of hardware buffered UARTs (NS16550AF etc.) found in some machines is automatic. 5. Interrupt driven hardware and XON/XOFF flow control is provided for. 6. All source code is included. RS232.C can be used with all memory models.

    標(biāo)簽: functionality provide written employ

    上傳時(shí)間: 2016-08-24

    上傳用戶:小眼睛LSL

  • This GLib version 2.16.1. GLib is the low-level core library that forms the basis for projects such

    This GLib version 2.16.1. GLib is the low-level core library that forms the basis for projects such as GTK+ and GNOME. It provides data structure handling for C, portability wrappers, and interfaces for such runtime functionality as an event loop, threads, dynamic loading, and an object system.

    標(biāo)簽: GLib the low-level projects

    上傳時(shí)間: 2013-12-19

    上傳用戶:tb_6877751

  • 很好的VB課件

    很好的VB課件,非常詳細(xì),包括第1章Visual Basic概述第2章 語言基礎(chǔ) 第3章 Visual Basic程序結(jié)構(gòu) 第4章 子過程(Sub、Function、Property和Event)第5章 常用控件與窗體 第6章 使用Windows API 第7章 通用對(duì)話框和剪貼板的應(yīng)用 第8章 菜單的設(shè)計(jì)和MDI程序設(shè)計(jì) 第9章 文件操作 第10章 圖形基礎(chǔ) 第11章 程序調(diào)試和出錯(cuò)處理 第12章鼠標(biāo)事件和OLE拖放 第13章 Visual Basic和數(shù)據(jù)庫操作 第14章 Visual Basic與數(shù)據(jù)庫的擴(kuò)展

    標(biāo)簽:

    上傳時(shí)間: 2016-11-04

    上傳用戶:zycidjl

  • import flash.display.Sprite import flash.display.Bitmap import flash.display.BitmapData import

    import flash.display.Sprite import flash.display.Bitmap import flash.display.BitmapData import flash.filters.BlurFilter import flash.events.Event import flash.geom.Point import flash.events.MouseEvent import flash.display.SimpleButton import flash.display.Shape

    標(biāo)簽: import display flash BitmapData

    上傳時(shí)間: 2014-01-24

    上傳用戶:凌云御清風(fēng)

  • 本例展示了如何使用嵌套中斷向量控制器(Nested Vectored Interrupt Controller)來設(shè)置IRQ通道。 把3個(gè)計(jì)時(shí)器(TIM2

    本例展示了如何使用嵌套中斷向量控制器(Nested Vectored Interrupt Controller)來設(shè)置IRQ通道。 把3個(gè)計(jì)時(shí)器(TIM2,3,4)設(shè)置為在每一個(gè)計(jì)數(shù)器更新事項(xiàng)(counter update event)產(chǎn)生中斷。這三個(gè)計(jì)時(shí)器都與各自對(duì)應(yīng)的更新IRQ通道聯(lián)系起來,并設(shè)置他們的中斷優(yōu)先級(jí),TIM2為0,TIM4為2。 在他們各自的中斷中:TIM2每1秒翻轉(zhuǎn)一次PC.06的狀態(tài);TIM3每2秒翻轉(zhuǎn)一次PC.07的狀態(tài);TIM4每3秒翻轉(zhuǎn)一次PC.08的狀態(tài)。 由于在STM3210B-LK1板上, 4個(gè)LED連接在PC.04 – PC.07,而不是STM3210B-EVAL上的PC.06 – PC.09,因此,程序要做相應(yīng)的改動(dòng)。

    標(biāo)簽: Controller Interrupt Vectored Nested

    上傳時(shí)間: 2013-12-18

    上傳用戶:Zxcvbnm

  • FreeBREW is a collection of open source software for BREW. BREW Foundation Framework provides a mult

    FreeBREW is a collection of open source software for BREW. BREW Foundation Framework provides a multitasking-aware kernel which supports a layered, per-task and per-state event dispatching mechanism to enable robust, state-pattern programming in BREW

    標(biāo)簽: BREW Foundation collection Framework

    上傳時(shí)間: 2017-02-07

    上傳用戶:上善若水

  • EJB3的入門資料

    EJB3的入門資料,相當(dāng)不錯(cuò)的一個(gè)東東.具體包括SessionBean, Message Driven Bean, EntityBean,是入門的首選

    標(biāo)簽: EJB3

    上傳時(shí)間: 2013-12-17

    上傳用戶:heart520beat

  • What is Verilog? ➥ Verilog HDL is a Hardware Description Language (HDL) ➥ Verilog HDL

    What is Verilog? ➥ Verilog HDL is a Hardware Description Language (HDL) ➥ Verilog HDL allows describe designs at a high level of abstraction as well as the lower implementation levels ➥ Primary use of HDLs is the simulation of designs ➥ Verilog is a discrete event time simulator  What is VeriWell? ➥ VeriWell is a comprehensive implementation of Verilog HDL

    標(biāo)簽: Verilog HDL 10149 Description

    上傳時(shí)間: 2017-02-18

    上傳用戶:

  • Browser independent JavaScript SDK. ClassLoader to lazy load JavaScript classes, extensions to core

    Browser independent JavaScript SDK. ClassLoader to lazy load JavaScript classes, extensions to core JavaScript, Reflection API, Collection API, Unit Testing API, AJAX API, Logging API, and Custom/DOM Event API.

    標(biāo)簽: JavaScript independent ClassLoader extensions

    上傳時(shí)間: 2017-02-19

    上傳用戶:skhlm

  • 非常好的swing的源代碼

    非常好的swing的源代碼,能幫助你加深理解swing里面的event處理,多線程處理等方面的知識(shí)

    標(biāo)簽: swing 源代碼

    上傳時(shí)間: 2013-12-21

    上傳用戶:youke111

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