Weekly Activity Report feasibility Repor
標(biāo)簽: feasibility Activity Weekly Report
上傳時(shí)間: 2014-01-13
上傳用戶:qwe1234
In this paper, the feasibility of replacing a chaos source by an equivalent digital pseudo-random generator realized using Linear Feedback Shift Register (LFSR) is studied. Particular emphasis is given on the digital implementation Piece-Wise Linear Affine Maps (PWAM). As an application, an FPGA implementation of four different maps has been experimentally verified in a FM-DCSK test radio system.
標(biāo)簽: pseudo-random feasibility equivalent replacing
上傳時(shí)間: 2013-12-13
上傳用戶:從此走出陰霾
光伏發(fā)電是未來(lái)新能源發(fā)電重要方向之一,而光伏變流器是光伏發(fā)電系統(tǒng)的核心。介紹一種基于微網(wǎng)理念的光伏變流器設(shè)計(jì)。以該變流器為核心的光伏發(fā)電系統(tǒng)可以看做一個(gè)小型的微網(wǎng)系統(tǒng)。該系統(tǒng)能根據(jù)外部電網(wǎng)情況,工作于并網(wǎng)模式和離網(wǎng)模式。介紹了該系統(tǒng)的各個(gè)組成部件的設(shè)計(jì)以及變流器主電路部分器件的選型。最后,由實(shí)驗(yàn)樣機(jī)進(jìn)行測(cè)試。試驗(yàn)結(jié)果驗(yàn)證了電路拓?fù)浣Y(jié)構(gòu)及控制方案的可行性,也說(shuō)明了系統(tǒng)參數(shù)設(shè)計(jì)方法的正確性。 Abstract: Solar Photovoltaic generation is an important direction of new energy power generation in the future,while photovoltaic converter is the core of photovoltaic generation system. This paper deals with a study on photovoltaic inverter based on the concept of microgrid. This paper describes a system whose core component is the photovoltaic inverter,can work on grid-connected mode or run independently according to the external situation. The paper simply describes the main components of the system. At last,the prototype was produced and tested. Test result has proved feasibility of circuit topology structure and controlling scheme and shown correctness of system parameters.Key words: PV inverter; microgrid; off-grid; storage battery
標(biāo)簽: 光伏 變流器 系統(tǒng)設(shè)計(jì)
上傳時(shí)間: 2014-12-24
上傳用戶:Shaikh
Sanos Operating System Kernel ----------------------------- Sanos is an OS kernel for use in PC based server appliances. The kernel was developed as part of an experiment on investigating the feasibility of running java server applications without a traditional operating system only using a simple kernel.
標(biāo)簽: Sanos Operating Kernel System
上傳時(shí)間: 2014-01-03
上傳用戶:1159797854
This document provides guidelines for integrating a discrete high speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標(biāo)簽: integrating controller guidelines document
上傳時(shí)間: 2013-11-27
上傳用戶:電子世界
This document provides guidelines for integrating a discrete high speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標(biāo)簽: integrating controller guidelines document
上傳時(shí)間: 2015-11-18
上傳用戶:xhz1993
Abstract:It惴 described systematically the architecture and function of the software of Railway Auto-ticketing System as well as its charac— ter~tic and demand。Analysized the 8oftware middleware and messaged oriented middleware(MOM),discussed the feasibility of the app~cation 0f JWMQ in the Railway Auto-ticketing System.
標(biāo)簽: systematically architecture described the
上傳時(shí)間: 2016-05-14
上傳用戶:JasonC
3rd Generation Partnership Project; Technical Specification Group Radio Access Network; Further advancements for E-UTRA; LTE-Advanced feasibility studies in RAN WG4 (Release 9)
上傳時(shí)間: 2018-04-28
上傳用戶:doforfuture
針對(duì)交流電路過(guò)零檢測(cè)電路存在結(jié)構(gòu)復(fù)雜、過(guò)零點(diǎn)檢測(cè)不準(zhǔn)確、編程繁瑣等問(wèn)題,設(shè)計(jì)了一種基于LM339的硬件結(jié)構(gòu)簡(jiǎn)單的過(guò)零檢測(cè)電路。通過(guò)仿真軟件Mulisim對(duì)該設(shè)計(jì)電路進(jìn)行了仿真,實(shí)驗(yàn)證明了該方案過(guò)零檢測(cè)的可行性、穩(wěn)定性和可靠性,可直接作為交流電路中CPU的過(guò)零信號(hào)。Aiming at the problems of AC cilsuit zero crossing detection circuit such as complex structure, zero crossing detection and cumbersome programming, a zero crossing detection circuit with simple hardware structure based on LM339 was designed. The design circuit was simulated by simulation software Mulisim, and the feasibility, stability and reliability of zero crossing detection were proved by experiments, which can be used as zero crossing signal of CPU in AC circuit directly.
上傳時(shí)間: 2022-05-03
上傳用戶:
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