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#include <stdio.h>
#include <stdlib.h> ///鏈式棧
typedef struct node
{
int data;
struct node *next;
}Node,*Linklist;
Linklist Createlist()
{
Linklist p;
Linklist h;
int data1;
scanf("%d",&data1);
if(data1 != 0)
{
h = (Node *)malloc(sizeof(Node));
h->data = data1;
h->next = NULL;
}
else if(data1 == 0)
return NULL;
scanf("%d",&data1);
while(data1 != 0)
{
p = (Node *)malloc(sizeof(Node));
p -> data = data1;
p -> next = h;
h = p;
scanf("%d",&data1);
}
return h;
}
void Outputlist(Node *head)
{
Linklist p;
p = head;
while(p != NULL )
{
printf("%d ",p->data);
p = p->next;
}
printf("\n");
}
void Freelist(Node *head)
{
Node *p;
Node *q = NULL;
p = head;
while(p != NULL)
{
q = p;
p = p->next;
free(q);
}
}
int main()
{
Node *head;
head = Createlist();
Outputlist(head);
Freelist(head);
return 0;
}
2.順序棧
[cpp] view plain copy
#include <iostream>
#include <stdio.h>
#include <stdlib.h> ///順序棧
#define MaxSize 100
using namespace std;
typedef
標簽:
數據結構
實驗
上傳時間:
2018-05-09
上傳用戶:123456..
-
#include <iostream>
#include <stdio.head>
#include <stdlib.head>
#include <string.head>
#define ElemType int
#define max 100
using namespace std;
typedef struct node1
{
ElemType data;
struct node1 *next;
}Node1,*LinkList;//鏈棧
typedef struct
{
ElemType *base;
int top;
}SqStack;//順序棧
typedef struct node2
{
ElemType data;
struct node2 *next;
}Node2,*LinkQueue;
typedef struct node22
{
LinkQueue front;
LinkQueue rear;
}*LinkList;//鏈隊列
typedef struct
{
ElemType *base;
int front,rear;
}SqQueue;//順序隊列
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//1.采用鏈式存儲實現棧的初始化、入棧、出棧操作。
LinkList CreateStack()//創建棧
{
LinkList top;
top=NULL;
return top;
}
bool StackEmpty(LinkList s)//判斷棧是否為空,0代表空
{
if(s==NULL)
return 0;
else
return 1;
}
LinkList Pushead(LinkList s,int x)//入棧
{
LinkList q,top=s;
q=(LinkList)malloc(sizeof(Node1));
q->data=x;
q->next=top;
top=q;
return top;
}
LinkList Pop(LinkList s,int &e)//出棧
{
if(!StackEmpty(s))
{
printf("棧為空。");
}
else
{
e=s->data;
LinkList p=s;
s=s->next;
free(p);
}
return s;
}
void DisplayStack(LinkList s)//遍歷輸出棧中元素
{
if(!StackEmpty(s))
printf("棧為空。");
else
{
wheadile(s!=NULL)
{
cout<<s->data<<" ";
s=s->next;
}
cout<<endl;
}
}
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//2.采用順序存儲實現棧的初始化、入棧、出棧操作。
int StackEmpty(int t)//判斷棧S是否為空
{
SqStack.top=t;
if (SqStack.top==0)
return 0;
else return 1;
}
int InitStack()
{
SqStack.top=0;
return SqStack.top;
}
int pushead(int t,int e)
{
SqStack.top=t;
SqStack.base[++SqStack.top]=e;
return SqStack.top;
}
int pop(int t,int *e)//出棧
{
SqStack.top=t;
if(!StackEmpty(SqStack.top))
{
printf("棧為空.");
return SqStack.top;
}
*e=SqStack.base[s.top];
SqStack.top--;
return SqStack.top;
}
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//3.采用鏈式存儲實現隊列的初始化、入隊、出隊操作。
LinkList InitQueue()//創建
{
LinkList head;
head->rear=(LinkQueue)malloc(sizeof(Node));
head->front=head->rear;
head->front->next=NULL;
return head;
}
void deleteEle(LinkList head,int &e)//出隊
{
LinkQueue p;
p=head->front->next;
e=p->data;
head->front->next=p->next;
if(head->rear==p) head->rear=head->front;
free(p);
}
void EnQueue(LinkList head,int e)//入隊
{
LinkQueue p=(LinkQueue)malloc(sizeof(Node));
p->data=e;
p->next=NULL;
head->rear->next=p;
head->rear=p;
}
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//4.采用順序存儲實現循環隊列的初始化、入隊、出隊操作。
bool InitQueue(SqQueue &head)//創建隊列
{
head.data=(int *)malloc(sizeof(int));
head.front=head.rear=0;
return 1;
}
bool EnQueue(SqQueue &head,int e)//入隊
{
if((head.rear+1)%MAXQSIZE==head.front)
{
printf("隊列已滿\n");
return 0;
}
head.data[head.rear]=e;
head.rear=(head.rear+1)%MAXQSIZE;
return 1;
}
int QueueLengthead(SqQueue &head)//返回隊列長度
{
return (head.rear-head.front+MAXQSIZE)%MAXQSIZE;
}
bool deleteEle(SqQueue &head,int &e)//出隊
{
if(head.front==head.rear)
{
cout<<"隊列為空!"<<endl;
return 0;
}
e=head.data[head.front];
head.front=(head.front+1)%MAXQSIZE;
return 1;
}
int gethead(SqQueue head)//得到隊列頭元素
{
return head.data[head.front];
}
int QueueEmpty(SqQueue head)//判斷隊列是否為空
{
if (head.front==head.rear)
return 1;
else
return 0;
}
void travelQueue(SqQueue head)//遍歷輸出
{
wheadile(head.front!=head.rear)
{
printf("%d ",head.data[head.front]);
head.front=(head.front+1)%MAXQSIZE;
}
cout<<endl;
}
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//5.在主函數中設計一個簡單的菜單,分別測試上述算法。
int main()
{
LinkList top=CreateStack();
int x;
wheadile(scanf("%d",&x)!=-1)
{
top=Pushead(top,x);
}
int e;
wheadile(StackEmpty(top))
{
top=Pop(top,e);
printf("%d ",e);
}//以上是鏈棧的測試
int top=InitStack();
int x;
wheadile(cin>>x)
top=pushead(top,x);
int e;
wheadile(StackEmpty(top))
{
top=pop(top,&e);
printf("%d ",e);
}//以上是順序棧的測試
LinkList Q;
Q=InitQueue();
int x;
wheadile(scanf("%d",&x)!=-1)
{
EnQueue(Q,x);
}
int e;
wheadile(Q)
{
deleteEle(Q,e);
printf("%d ",e);
}//以上是鏈隊列的測試
SqQueue Q1;
InitQueue(Q1);
int x;
wheadile(scanf("%d",&x)!=-1)
{
EnQueue(Q1,x);
}
int e;
wheadile(QueueEmpty(Q1))
{
deleteEle(Q1,e);
printf("%d ",e);
}
return 0;
}
標簽:
數據結構
實驗
上傳時間:
2018-05-09
上傳用戶:123456..
-
The objective of this book is to allow the reader to predict the received
signal power produced by a particular radio transmitter. The first two
chapters examine propagation in free space for point-to-point and
point-to-area transmission, respectively. This is combined with a dis-
cussion regarding the characteristics of antennas for various purposes. In
chapter 3, the effect of obstacles, whether buildings or mountains, is
discussed and analytical methods, whereby the strength of a signal is the
shadow of an obstacle can be predicted, are presented.
標簽:
Propagation
Essentials
Radio
Wave
of
上傳時間:
2020-05-27
上傳用戶:shancjb
-
The use of optical free-space emissions to provide indoor wireless commu-
nications has been studied extensively since the pioneering work of Gfeller
and Bapst in 1979 [1]. These studies have been invariably interdisciplinary in-
volving such far flung areas such as optics design? indoor propagation studies?
electronics design? communications systems design among others. The focus
of this text is on the design of communications systems for indoor wireless
optical channels. Signalling techniques developed for wired fibre optic net-
works are seldom efficient since they do not consider the bandwidth restricted
nature of the wireless optical channel.
標簽:
Communication
Wireless
Optical
Systems
上傳時間:
2020-06-01
上傳用戶:shancjb
-
Sound is simply an airborne version of vibration. The air which carries sound is a mixture
of gases. In gases, the molecules contain so much energy that they break free from
their neighbors and rush around at high speed. As Figure 1.1(a) shows, the innumerable
elastic collisions of these high-speed molecules produce pressure on the walls of any
gas container. If left undisturbed in a container at a constant temperature, eventually the
pressure throughout would be constant and uniform.
標簽:
Engineering
Audio
上傳時間:
2020-06-09
上傳用戶:shancjb
-
Computer science as an academic discipline began in the 1960’s. Emphasis was on
programming languages, compilers, operating systems, and the mathematical theory that
supported these areas. Courses in theoretical computer science covered finite automata,
regular expressions, context-free languages, and computability. In the 1970’s, the study
of algorithms was added as an important component of theory. The emphasis was on
making computers useful. Today, a fundamental change is taking place and the focus is
more on a wealth of applications. There are many reasons for this change. The merging
of computing and communications has played an important role. The enhanced ability
to observe, collect, and store data in the natural sciences, in commerce, and in other
fields calls for a change in our understanding of data and how to handle it in the modern
setting. The emergence of the web and social networks as central aspects of daily life
presents both opportunities and challenges for theory.
標簽:
Foundations
Science
Data
of
上傳時間:
2020-06-10
上傳用戶:shancjb
-
Xilinx FPGA Virtex-7 全系列(AD集成封裝庫),IntLib后綴文件,PCB封裝帶3D視圖,拆分后文件為PcbLib+SchLib格式,Altium Designer原理圖庫+PCB封裝庫,集成封裝型號列表:Library Component Count : 157Name Description----------------------------------------------------------------------------------------------------XC7V2000T-1FHG1761C Virtex-7 FPGA, 1200 User I/Os, 36 GTX, 1760-Ball BGA, Speed Grade 1, Commerical Grade, Pb-FreeXC7V2000T-1FHG1761I Virtex-7 FPGA, 1200 User I/Os, 36 GTX, 1760-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7V2000T-1FLG1925C Virtex-7 FPGA, 1200 User I/Os, 16 GTX, 1924-Ball BGA, Speed Grade 1, Commercial Grade, Pb-FreeXC7V2000T-1FLG1925I Virtex-7 FPGA, 1200 User I/Os, 16 GTX, 1924-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7V2000T-2FHG1761C Virtex-7 FPGA, 1200 User I/Os, 36 GTX, 1760-Ball BGA, Speed Grade 2, Commerical Grade, Pb-FreeXC7V2000T-2FLG1925C Virtex-7 FPGA, 1200 User I/Os, 16 GTX, 1924-Ball BGA, Speed Grade 2, Commercial Grade, Pb-FreeXC7V2000T-2GFHG1761EVirtex-7 FPGA, 1200 User I/Os, 36 GTX, 1760-Ball BGA, Speed Grade 2G, Extended Grade, Pb-FreeXC7V2000T-2GFLG1925EVirtex-7 FPGA, 1200 User I/Os, 16 GTX, 1924-Ball BGA, Speed Grade 2G, Extended Grade, Pb-FreeXC7V2000T-2LFHG1761EVirtex-7 FPGA, 1200 User I/Os, 36 GTX, 1760-Ball BGA, Speed Grade 2L, Extended Grade, Pb-FreeXC7V2000T-2LFLG1925EVirtex-7 FPGA, 1200 User I/Os, 16 GTX, 1924-Ball BGA, Speed Grade 2L, Extended Grade, Pb-FreeXC7V585T-1FFG1157C Virtex-7 FPGA, 850 User I/Os, 20 GTX, 1156-Ball BGA, Speed Grade 1, Commercial Grade, Pb-FreeXC7V585T-1FFG1157I Virtex-7 FPGA, 850 User I/Os, 20 GTX, 1156-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7V585T-1FFG1761C Virtex-7 FPGA, 850 User I/Os, 36 GTX, 1760-Ball BGA, Speed Grade 1, Commercial Grade, Pb-FreeXC7V585T-1FFG1761I Virtex-7 FPGA, 850 User I/Os, 36 GTX, 1760-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7V585T-2FFG1157C Virtex-7 FPGA, 850 User I/Os, 20 GTX, 1156-Ball BGA, Speed Grade 2, Commercial Grade, Pb-FreeXC7V
標簽:
xilinx
fpga
virtex-7
封裝
上傳時間:
2021-12-22
上傳用戶:aben
-
Xilinx FPGA Artix-7 全系列(AD集成封裝庫),IntLib后綴文件,PCB封裝帶3D視圖,拆分后文件為PcbLib+SchLib格式,Altium Designer原理圖庫+PCB封裝庫,集成封裝型號列表:Library Component Count : 48Name Description----------------------------------------------------------------------------------------------------XC7A100T-1CSG324C Artix-7 FPGA, 210 User I/Os, 0 GTP, 324-Ball BGA, Speed Grade 1, Commercial Grade, Pb-FreeXC7A100T-1CSG324I Artix-7 FPGA, 210 User I/Os, 0 GTP, 324-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7A100T-1FGG484C Artix-7 FPGA, 285 User I/Os, 4 GTP, 484-Ball BGA, Speed Grade 1, Commercial Grade, Pb-FreeXC7A100T-1FGG484I Artix-7 FPGA, 285 User I/Os, 4 GTP, 484-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7A100T-1FGG676C Artix-7 FPGA, 300 User I/Os, 8 GTP, 676-Ball BGA, Speed Grade 1, Commercial Grade, Pb-FreeXC7A100T-1FGG676I Artix-7 FPGA, 300 User I/Os, 8 GTP, 676-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7A100T-1FTG256C Artix-7 FPGA, 170 User I/Os, 0 GTP, 256-Ball BGA, Speed Grade 1, Commercial Grade, Pb-FreeXC7A100T-1FTG256I Artix-7 FPGA, 170 User I/Os, 0 GTP, 256-Ball BGA, Speed Grade 1, Industrial Grade, Pb-FreeXC7A100T-2CSG324C Artix-7 FPGA, 210 User I/Os, 0 GTP, 324-Ball BGA, Speed Grade 2, Commercial Grade, Pb-FreeXC7A100T-2CSG324I Artix-7 FPGA, 210 User I/Os, 0 GTP, 324-Ball BGA, Speed Grade 2, Industrial Grade, Pb-FreeXC7A100T-2FGG484C Artix-7 FPGA, 285 User I/Os, 4 GTP, 484-Ball BGA, Speed Grade 2, Commercial Grade, Pb-FreeXC7A100T-2FGG484I Artix-7 FPGA, 285 User I/Os, 4 GTP, 484-Ball BGA, Speed Grade 2, Industrial Grade, Pb-FreeXC7A100T-2FGG676C Artix-7 FPGA, 300 User I/Os, 8 GTP, 676-Ball BGA, Speed Grade 2, Commercial Grade, Pb-FreeXC7A100T-2FGG676I Artix-7 FPGA, 300 User I/Os, 8 GTP, 676-Ball BGA, Speed Grade 2, Industrial Grade, Pb-FreeXC7A100T-2FTG256C Artix-7 FPGA, 170 User I/Os, 0 GTP, 256-Ball BGA, Speed Grade 2, Commercial Grade, Pb-FreeXC7A100T-2FTG256I Artix-7 FPGA, 170 User I/Os, 0 GTP, 2
標簽:
xilinx
fpga
上傳時間:
2021-12-22
上傳用戶:
-
這是介紹藍牙電話免提協議的最新文檔,
標簽:
藍牙電話
免提協議
上傳時間:
2022-02-01
上傳用戶:
-
The PW2601 is a charger front-end integrated circuit designed to provide protection to Li-ionbatteries from failures of charging circuitry. The device monitors the input voltage, battery voltageand the charging current to make sure all three parameters are operated in normal range. Thedevice will switch off internal MOSFET to disconnect IN to OUT to protect load when any of inputvoltage, output current exceeds the threshold. The Over temperature protection (OTP) functionmonitors chip temperature to protect the device. The PW2601 also can protect the system’sbattery from being over charged by monitors the battery voltage continuously. The deviceoperates like a linear regulator, maintaining a 5.1V output with input voltages up to the input overvoltage threshold.The PW2601 is available in DFN-2x2-8L package. Standard products are Pb-free and Halogenfree
標簽:
pw2601
上傳時間:
2022-02-11
上傳用戶: